M58LT256JSB8ZA6 STMICROELECTRONICS [STMicroelectronics], M58LT256JSB8ZA6 Datasheet - Page 16

• Manufacturer Part Number: M58LT256JSB8ZA6
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Bus operations
3.5
3.6
16/106
Standby
Standby disables most of the internal circuitry allowing a substantial reduction of the current
consumption. The memory is in standby when Chip Enable and Reset are at V
consumption is reduced to the standby level I
independently from the Output Enable or Write Enable inputs. If Chip Enable switches to V
during a program or erase operation, the device enters Standby mode when finished.
Reset
During Reset mode the memory is deselected and the outputs are high impedance. The
memory is in Reset mode when Reset is at V
Reset level, independently from the Chip Enable, Output Enable or Write Enable inputs. If
Reset is pulled to V
content is no longer valid.
Table 3.
1. X = Don't care.
2. WAIT signal polarity is configured using the Set Configuration Register command.
3. L can be tied to V
4. Depends on G.
Bus Read
Bus Write
Address Latch
Output Disable
Standby
Reset
Operation
Bus operations
IH
V
V
V
V
V
SS
if the valid address has been previously latched.
E
X
IH
IL
IL
IL
IL
during a Program or Erase, this operation is aborted and the memory
V
V
V
G
X
X
X
IH
IH
IL
(1)
V
V
V
V
W
X
X
IH
IH
IH
IL
V
V
V
IL
IL
L
X
X
X
DD3
IL
(3)
(3)
IL
. The power consumption is reduced to the
and the outputs are set to high impedance,
RP
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
WAIT
M58LT256JST, M58LT256JSB
Hi-Z
Hi-Z
Hi-Z
(2)
Data output or Hi-Z
Data output
DQ15-DQ0
Data input
Hi-Z
Hi-Z
Hi-Z
IH
. The power
(4)
IH