DM9620 DAVICOM [Davicom Semiconductor, Inc.], DM9620 Datasheet - Page 26

• Manufacturer Part Number: DM9620
• Description: USB2.0 to 10/100M Fast Ethernet Controller
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

4.28 General Purpose Control Register 3 (36H)
4.29 General Purpose Register 3 (37H)
4.30 EEPROM and PHY Control Register (3AH)
4.31 Pause Packet Control/Status Register (3DH)
4.32 Transmit Packet Counter (81H)
Preliminary
Version: DM9620 -15-DS-P02
February 20, 2012
7~0
7~0
4~3
1~0
7~4
3~0
7-0
Bit
Bit
Bit
Bit
Bit
7
6
5
2
PAUSE_MAX
PAUSE_CTR
EECK_SPD
FORCE_46
MDC_SPD
NO_PRE
TX_CTR
DET_46
DET_56
Name
GPC3
Name
GPD3
Name
Name
Name
PHS4,RW
HP0,RW
HP0,RW
PT0,RW
PS0,RO
Default
Default
Default
Default
Default
P0,RW
P0,RW
P0,RW
P0,RO
P0,RO
P0,RO
General Purpose Control 3
Define the input mode (“0”,) or output mode (“1”) of pins GP_GRP3.
Where the GP_GRP3 are pins GPIO3 listed in pin description
General Purpose Register 3 Data
When the correspondent bit of General Purpose Control Register 3 is set, i.e.
output mode, the value of the bit is reflected to pin GP_GRP3
When the correspondent bit of General Purpose Control Register 3 is 0, i.e.
input mode, the value of the bit to be read is reflected from correspondent pins
GP_GRP3
Force EEPROM to 93C46 type
Auto-detect EEPROM as 93C46
Auto-detect EEPROM as 93C56
Re-define EEPROM EECK speed
00=0.2Mhz, 01=0.5MHz, 10=1MHz, 11=2MHz
Do no generate Ethernet PHY preamble in MDIO
Re-define Ethernet PHY MDC speed
00=1Mhz, 01=3.1MHz, 10=12.5MHz, 11=0.25MHz
Pause Packet Counter
reached.
Max. Pause Packet Count
SRAM is still in high threshold when pause timer timeout.
TX Packet Count
The TX packet count in TX SRAM.
The Pause packet counter before RX SRAM flow control low threshold
The maximum pause packet with timer FFFFH is transmit, when the RX
Description
Description
Description
Description
Description
USB2.0 to Fast Ethernet Controller
DM9620
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