DM9620 DAVICOM [Davicom Semiconductor, Inc.], DM9620 Datasheet - Page 22

• Manufacturer Part Number: DM9620
• Description: USB2.0 to 10/100M Fast Ethernet Controller
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

4.11 EEPROM & PHY Address Register ( 0CH )
4.12 EEPROM & PHY Data Register ( EE_PHY_L：0DH
4.13 Wake Up Control Register ( 0FH )
4.14 Physical Address Register ( 10H~15H )
Preliminary
Version: DM9620 -15-DS-P02
February 20, 2012
Bit
7:6
5:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
Bit
Bit
Bit
0
7
6
5
4
3
2
1
0
Name
SAMPLEEN
SAMPLEST
EE_PHY_H
EE_PHY_L
PHY_ADR
MAGICEN
MAGICST
SMI_EN
SMI_ST
LINKEN
LINKST
EROA
ERRE
Name
Name
Name
PAB5
PAB4
PAB3
PAB2
PAB1
PAB0
Default
PH01,RW
PH0,RW
PE0,RW
PE0,RW
PE0,RW
PH0,RO
Default
Default
P0,RW
P0,RO
P0,RO
P0,RO
P0,RO
X,RW
X,RW
E,RW
E,RW
E,RW
E,RW
E,RW
E,RW
Type
EEPROM Access Status or PHY Access Status
When set, it indicates that the EEPROM or PHY access is in progress.
PHY Address bit [1:0] or EEPROM Word Address[7:6]:
EEPROM Word Address[5:0] or PHY Register Number
Description
EEPROM or PHY Low Byte Data
EEPROM or PHY High Byte Data
Physical Address Byte 5 (15H)
Physical Address Byte 4 (14H)
Physical Address Byte 3 (13H)
Physical Address Byte 2 (12H)
Physical Address Byte 1 (11H)
Physical Address Byte 0 (10H)
SMI_C Event Enable
When set, enable SMI_C as GPIO Wake-up Event.
This event occurred in 100ms low state and then 100ms high state in SMI_CK
pin
SMI_C Even Status
When set, indicates SMI_C Event occurred.
Link Change Event Enable
When set, enable Link Status Change Wake-up Event.
Sample Frame Match Event Enable
When set, enable Sample Frame Wake-up Event.
Magic Packet Event Enable
When set, enable Magic Packet Wake-up Event.
Link change Event Status
When set, indicates link change and Link Status Change Event occurred.
Sample Frame Mtach Event Status
When set, indicates the sample frame is received and Sample Frame Event
occurred. This bit will not be affected after a software reset.
Magic Packet Event Status
When set, indicates the Magic Packet is received and Magic packet Event
occurred. This bit will not be affected after a software reset.
If it is in PHY mode operation , the PHY address bit [4:2] is force to 0.
Force to 01 if internal PHY is selected.
Or EEPROM Word Address[7:6] if EEPROM 93C56/66 is used
EE_PHY_H：0EH )
Description
Description
Description
USB2.0 to Fast Ethernet Controller
DM9620
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