CS8405A-IS CIRRUS [Cirrus Logic], CS8405A-IS Datasheet - Page 20

• Manufacturer Part Number: CS8405A-IS
• Description: 96 kHz Digital Audio Interface Transmitter
• Manufacturer: CIRRUS [Cirrus Logic]

8.5
20
SIMS
7
Serial Audio Input Port Data Format (05h)
SIMS - Master/Slave Mode Selector
SISF - ISCLK frequency (for master mode)
SIRES1:0 - Resolution of the input data, for right-justified formats
SIJUST - Justification of SDIN data relative to ILRCK
SIDEL - Delay of SDIN data relative to ILRCK, for left-justified data formats
SISPOL - ISCLK clock polarity
SILRPOL - ILRCK clock polarity
Default = ‘0’
0 - Serial audio input port is in slave mode
1 - Serial audio input port is in master mode
Default = ‘0’
0 - 64*Fs
1 - 128*Fs
Default = ‘00’
00 - 24-bit resolution
01 - 20-bit resolution
10 - 16-bit resolution
11 - Reserved
Default = ‘0’
0 - Left-justified
1 - Right-justified
Default = ‘0’
0 - MSB of SDIN data occurs in the first ISCLK period after the ILRCK edge (left justified mode)
1 - MSB of SDIN data occurs in the second ISCLK period after the ILRCK edge (I²S mode)
Default = ‘0’
0 - SDIN sampled on rising edges of ISCLK
1 - SDIN sampled on falling edges of ISCLK
Default = ‘0’
0 - SDIN data is for the left channel when ILRCK is high
1 - SDIN data is for the right channel when ILRCK is high
SISF
6
SIRES1
5
SIRES0
4
SIJUST
3
SIDEL
2
SISPOL
1
CS8405A
SILRPOL
DS469F2
0