PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 167

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 42
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 43
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
REPCM
7
7
0
RTSA0
Receive Time Slot Assignment Register 0
RTSA1
Receive Time Slot Assignment Register 1
6
6
0
read/write
00
Channel A
2C
written by CPU;
read and evaluated by SEROCCO-H
read/write
00
Channel A
2D
written by CPU;
read and evaluated by SEROCCO-H
H
H
H
H
5
5
0
Channel B
7C
Channel B
7D
Rx Time Slot Number
H
H
5-167
4
4
0
RTSN(6:0)
3
3
0
Register Description (RTSA0)
Rx Clock Shift
2
2
RCS(2:0)
1
1
PEB 20525
PEF 20525
2000-09-14
0
0