ADUC847BCP8-5 AD [Analog Devices], ADUC847BCP8-5 Datasheet - Page 18

• Manufacturer Part Number: ADUC847BCP8-5
• Description: MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU
• Manufacturer: AD [Analog Devices]

ADuC845/ADuC847/ADuC848
8052 INSTRUCTION SET
Table 4 documents the number of clock cycles required for each
instruction. Most instructions are executed in one or two clock
cycles resulting in 12.58 MIPs peak performance when operating
at PLLCON = 00H.
TIMER OPERATION
Timers on a standard 8052 increment by one with each machine
cycle. On the ADuC845, ADuC847, and ADuC848, one machine
cycle is equal to one clock cycle; therefore, the timers increment
at the same rate as the core clock.
AINCOM
REFIN+
REFIN–
AIN10*
IEXC1
IEXC1
AIN9*
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
56
10
11
12
15
16
13
11
12
1
2
3
9
8
7
*THE PIN NUMBERS REFER TO THE CSP PACKAGE ONLY.
200µA
SHADED AREAS ARE UPGRADES FROM THE ADuC834, AND INCLUDE A SINGLE-CYCLE CORE, UP TO 10 ADC INPUT
CHANNELS (8 ON THE MQFP PACKAGE).
46 47 48 49 52 53 54 55
4
5
CURRENT
SOURCE
MIX
6
MUX
AIN
22
200µA
36 51
REFERENCE
BUF
BAND GAP
23 37 38 50
DETECT
POR
V
REF
PGA
56
1
Figure 6. Detailed Block Diagram of the ADuC848
17
2
11-BIT STACK POINTER
62 kBYTES PROGRAM/
2 × DATA POINTERS
SERIAL PORT
PRIMARY ADC
3
4 kBYTES DATA/
Σ-∆ ADC
18
UART
9
16-BIT
FLASH/EE
FLASH/EE
10 11 12
DOWNLOADER
19
Rev. A | Page 18 of 108
DEBUGGER
ADuC848
CALIBRATION
TIMER
UART
CONTROL
30 31 32 33 39 40 41 42
ADC
AND
ALE
On the ADuC834, the output on the ALE pin is a clock at 1/6th
of the core operating frequency. On the ADuC845, ADuC847,
and ADuC848, the ALE pin operates as follows. For a single
machine cycle instruction, ALE is high for the entire machine
cycle. For a two or more machine cycle instruction, ALE is high
for the first machine cycle and then low for the remainder of
the machine cycles.
EXTERNAL MEMORY ACCESS
The ADuC845, ADuC847, and ADuC848 do not support
external program memory access, but the parts can access up to
16 MB (24 address bits) of external data memory. When
accessing external RAM, the EWAIT register might need to be
programmed in order to give extra machine cycles to MOVX
commands to allow for differing external RAM access speeds.
SINGLE-
44 43
CYCLE
CORE
8052
MCU
45
CONTROL
CONTROL
DAC
30
INTERFACE
SPI SERIAL
PWM
POWER SUPPLY
31
WATCHDOG
2304 BYTES
USER RAM
MONITOR
32
TIMER
33
16 17 18 19 22 23 24 25
PLL WITH PROG.
CLOCK DIVIDER
OUTPUT DAC
VOLTAGE
INTERFACE
RTC TIMER
I
WAKE-UP/
2
C SERIAL
12-BIT
Σ-∆ DAC
28
16-BIT
16-BIT
DUAL
DUAL
PWM
29
COUNTER
TIMERS
16-BIT
34
BUF
OSC
MUX
35
14
40
41
42
24
25
33
39
20
21
PWM1
PWMCLK
DAC
PWM0
T0
T1
T2
T2EX
INT0
INT1