DS89C420-ENL MAXIM [Maxim Integrated Products], DS89C420-ENL Datasheet - Page 49
![no-image](/images/no-image-200.jpg)
DS89C420-ENL
Manufacturer Part Number
DS89C420-ENL
Description
Ultra-High-Speed Microcontroller
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1.DS89C420-ENL.pdf
(58 pages)
- Current page: 49 of 58
- Download datasheet (670Kb)
NOTES:
1) The system clock frequency is dependent on the oscillator frequency and the setting of the clock-
2) External MOVX instruction times are dependent on the setting of the MD2, MD1, and MD0 bits in
3) Maximum load capacitance (to meet the above timing) for Port 0, ALE,
divide control bits (CD1 and CD0) and the crystal multiplier control bits (4X/
PMR register. The term “1 / t
the table given below.
the clock control register. The terms “t
through the use of the table given below.
limited to 60pF. Port 1, 2, 3, and 4 (except for P3.6,
of 50pF. XTAL1 and XTAL2 load capacitance is dependent on the frequency of the selected crystal.
MD2 MD1 MD0
0
0
0
0
1
1
1
1
4X/
X
X
X
1
0
2
X
1
0
0
1
1
0
0
1
CD1
0
1
0
1
0
1
0
1
0
0
0
1
1
INSTRUCTION
CLCL
(MACHINE
CD0
CYCLES)
MOVX
0
0
1
0
1
TIME
” used in the variable timing table is calculated through the use of
10
11
12
2
3
4
5
9
STC1
4 Oscillator Cycles
2 Oscillator Cycles
Reserved
1 Oscillator Cycle
1 / 1024 Oscillator Cycle
, t
49 of 58
STC2
NUMBER OF OSCILLATOR CYCLE PER
, t
STC3
(t
SYSTEM CLOCK (1 / t
WR
t
” used in the variable timing table are calculated
CLCL
STC1
10
14
18
22
26
0
2
6
and P3.7,
)
(t
t
CLCL
STC2
0
1
1
1
5
5
5
5
RD
)
) are tested with a capacitance
(t
t
CLCL
STC3
0
0
0
0
4
4
4
4
PSEN
CLCL
)
2
X
)
,
(t
t
and CTM) in the
CLCL
STC4
WR
0
0
0
0
1
1
1
1
, and
)
DS89C420
(t
t
CLCL
STC5
RD
0
1
1
1
1
1
1
1
)
is
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