DS89C420-ENL MAXIM [Maxim Integrated Products], DS89C420-ENL Datasheet - Page 22

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DS89C420-ENL

Manufacturer Part Number
DS89C420-ENL
Description
Ultra-High-Speed Microcontroller
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Figure 3. EXTERNAL PROGRAM MEMORY ACCESS
(NON-PAGE MODE and CD1:CD0 = 10)
EXTERNAL DATA MEMORY INTERFACE IN NON-PAGE MODE OPERATION
Just like the program memory cycle, the external data memory cycle is four times slower than the internal
data memory cycle in non-page mode. A basic internal memory cycle contains one system clock and a
basic external memory cycle contains four system clocks for non-page mode operation.
The DS89C420 allows software to adjust the speed of external data memory access by stretching the
memory bus cycle. CKCON (8Eh) provides an application-selectable stretch value for this purpose.
Software can change the stretch value dynamically by changing the setting of CKCON.2–CKCON.0.
Table 6 shows the data memory cycle stretch values and their effects on the external MOVX- memory bus
cycle and the control signal pulse width in terms of the number of oscillator clocks. A stretch machine
cycle always contains four system clocks.
Table 6. DATA MEMORY CYCLE STRETCH VALUES
MD2:MD0
XTAL1
ALE
PSEN
Port 0
Port 2
000
001
010
011
100
101
110
111
Internal Memory Cycles
STRETCH
CYCLES
10
0
1
2
3
7
8
9
RD / WR PULSE WIDTH (IN NUMBER OF OSCILLATOR CLOCKS)
4X/2X, CD1,
CD0 = 100
0.5
1
2
3
4
5
6
7
C1
Ext Memory Cycle
LSB Add
C2
22 of 58
MSB Add
4X/2X, CD1,
C3
CD0 = 000
10
12
14
1
2
4
6
8
C4
Data
C1
Ext Memory Cycle
LSB Add
4X/2X, CD1,
CD0 = X10
C2
MSB Add
12
16
20
24
28
2
4
8
C3
C4
Data
4X/2X, CD1,
CD0 = X11
12288
16384
20480
24576
28672
2048
4096
8192
DS89C420

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