MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 88

• Manufacturer Part Number: MC68HC908GR4
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Analog-to-Digital Converter (ADC)
5.8.3 ADC Clock Register
Technical Data
88
Address: $0003E
The ADC clock register (ADCLK) selects the clock frequency for the
ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
ADICLK — ADC Input Clock Select Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
ADIV2–ADIV0 form a 3-bit field which selects the divide ratio used by
the ADC to generate the internal ADC clock.
available clock configurations. The ADC clock should be set to
approximately 1 MHz.
ADICLK selects either the bus clock or CGMXCLK as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK
as the ADC clock source.
For More Information On This Product,
ADIV2
Bit 7
Analog-to-Digital Converter (ADC)
X = don’t care
0
ADIV2
Go to: www.freescale.com
Figure 5-4. ADC Clock Register (ADCLK)
0
0
0
0
1
= Unimplemented
ADIV1
Table 5-2. ADC Clock Divide Ratio
6
0
ADIV1
0
0
1
1
X
ADIV0
5
0
ADIV0
ADICLK
X
0
1
0
1
4
0
ADC input clock
ADC input clock
ADC input clock
ADC input clock
ADC input clock
3
0
0
ADC Clock Rate
MC68HC908GR8 — Rev 4.0
Table 5-2
2
0
0
1
2
4
8
16
shows the
1
0
0
MOTOROLA
Bit 0
0
0