MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 226
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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Input/Output Ports (I/O)
16.7.2 Data Direction Register E
Technical Data
226
NOTE:
Address:
TxD — SCI Transmit Data Output
Data direction register E (DDRE) determines whether each port E pin is
an input or an output. Writing a logic 1 to a DDRE bit enables the output
buffer for the corresponding port E pin; a logic 0 disables the output
buffer.
DDRE1 and DDRE0 — Data Direction Register E Bits
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Figure 16-19
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
The PTE0/TxD pin is the transmit data output for the SCI module.
When the enable SCI bit, ENSCI, is clear, the SCI module is disabled,
and the PTE0/TxD pin is available for general-purpose I/O. See
Communications Interface
These read/write bits control port E data direction. Reset clears
DDRE1 and DDRE0, configuring all port E pins as inputs.
For More Information On This Product,
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
$000C
Bit 7
Figure 16-18. Data Direction Register E (DDRE)
0
0
Go to: www.freescale.com
shows the port E I/O logic.
Input/Output Ports (I/O)
= Unimplemented
6
0
0
5
0
0
(SCI).
4
0
0
3
0
0
MC68HC908GR8 — Rev 4.0
2
0
0
DDRE1
1
0
MOTOROLA
DDRE0
Serial
Bit 0
0
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