MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 185

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MC68HC908GR4

Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MC68HC908GR8 — Rev 4.0
MOTOROLA
LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are in the configuration
register (MOR1). See
LVI’s configuration bits. Once an LVI reset occurs, the MCU remains in
reset until V
exit reset. See
interaction between the SIM and the LVI. The output of the comparator
controls the state of the LVIOUT flag in the LVI status register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
Freescale Semiconductor, Inc.
For More Information On This Product,
FROM CONFIG
DETECTOR
LVI5OR3
LOW V
V
DD
DD
DD
Go to: www.freescale.com
Low-Voltage Inhibit (LVI)
Figure 14-1. LVI Module Block Diagram
rises above a voltage, V
Low-Voltage Inhibit (LVI) Reset
V
V
DD
DD
FROM CONFIG
> LVI
LVIPWRD
Configuration Register (CONFIG)
LVI
Trip
Trip
= 0
= 1
LVIOUT
STOP INSTRUCTION
TRIPR
FROM CONFIG
LVIRSTD
, which causes the MCU to
for details of the
Low-Voltage Inhibit (LVI)
Functional Description
for details of the
FROM CONFIG
LVISTOP
LVI RESET
Technical Data
185

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