PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 331

• Manufacturer Part Number: PIC18F24J11
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

20.1
The BRG is a dedicated, 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSART. By default, the BRG operates
in 8-bit mode; setting the BRG16 bit (BAUDCONx<3>)
selects 16-bit mode.
The SPBRGHx:SPBRGx register pair controls the period
of a free-running timer. In Asynchronous mode, bits,
BRGH (TXSTAx<2>) and BRG16 (BAUDCONx<3>),
also control the baud rate. In Synchronous mode, BRGH
is ignored.
Table 20-1
baud rate for different EUSART modes, which only apply
in Master mode (internally generated clock).
Given the desired baud rate and F
integer value for the SPBRGHx:SPBRGx registers can
be calculated using the formulas in
this, the error in baud rate can be determined. An
example calculation is provided in
Typical baud rates and error values for the various
Asynchronous modes are provided in
may be advantageous to use the high baud rate
(BRGH = 1) or the 16-bit BRG to reduce the baud rate
error, or achieve a slow baud rate for a fast oscillator
frequency.
TABLE 20-1:
 2011 Microchip Technology Inc.
Legend: x = Don’t care, n = value of SPBRGHx:SPBRGx register pair
SYNC
0
0
0
0
1
1
Baud Rate Generator (BRG)
provides the formula for computation of the
Configuration Bits
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
BRGH
0
1
0
1
x
x
OSC
Table
Example
Table
, the nearest
20-1. From
20-2. It
20-1.
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
PIC18F46J11 FAMILY
Writing a new value to the SPBRGHx:SPBRGx
registers causes the BRG timer to be reset (or cleared).
This ensures the BRG does not wait for a timer
overflow before outputting the new baud rate.
When
SPBRGH:SPBRG values of 0000h and 0001h are not
supported. In the Asynchronous mode, all BRG values
may be used.
20.1.1
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRGx register pair.
20.1.2
The
RC7/PMA4/RX1/DT1/RP18 or RPn/RX2/DT2) is sam-
pled three times by a majority detect circuit to
determine if a high or a low level is present at the RXx
pin.
data
operated
OPERATION IN POWER-MANAGED
MODES
SAMPLING
on
in
Baud Rate = F
Baud Rate = F
n = F
n = F
Baud Rate = F
n = F
the
the
Baud Rate Formula
OSC
OSC
OSC
/[64* (Baud Rate)] -1
/[16* (Baud Rate)] -1
/[4* (Baud Rate)] -1
RXx
Synchronous
DS39932D-page 331
OSC
OSC
OSC
/[64 (n + 1)]
/[16 (n + 1)]
pin
/[4 (n + 1)]
(either
mode,