PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 145
PIC18F24J11
Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J11.pdf
(536 pages)
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10.5
PORTD is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt Trigger
input buffers. Each pin is individually configurable as an
input or output.
2011 Microchip Technology Inc.
Note:
PORTD, TRISD and LATD
Registers
PORTD is available only in 44-pin
devices.
PIC18F46J11 FAMILY
EXAMPLE 10-5:
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by setting bit, RDPU (PORTE<7>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on a
POR.
Note that the pull-ups can be used for any set of
features, similar to the pull-ups found on PORTB.
CLRF
MOVLW 0xCF
MOVWF TRISD
Note:
LATD
On a POR, these pins are configured as
digital inputs.
; Initialize LATD
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
;
;
INITIALIZING PORTD
RD<5:4> as outputs
RD<7:6> as inputs
DS39932D-page 145
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