PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 393

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PIC18F2480

Manufacturer Part Number
PIC18F2480
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
No
Q1
PC =
PC =
TOS =
PUSH PC to
Read literal
Address (HERE)
Address (Jump)
Address (HERE + 2)
operation
Relative Call
RCALL
-1024
(PC) + 2
(PC) + 2 + 2n
None
Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
1
2
HERE
stack
No
Q2
‘n’
1101
n
n
RCALL Jump
1023
TOS,
1nnn
operation
Process
Data
No
Q3
PC
nnnn
Write to PC
operation
PIC18F2480/2580/4480/4580
No
Q4
nnnn
Preliminary
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
RESET
None
Reset all registers and flags that are
affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
0000
operation
No
Q3
DS39637A-page 391
1111
operation
No
Q4
1111

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