PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 141

• Manufacturer Part Number: PIC18F2480
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 10-7:
 2004 Microchip Technology Inc.
RD0/PSP0/
C1IN+
RD1/PSP1/
C1IN-
RD2/PSP2/
C2IN+
RD3/PSP3/
C2IN-
RD4/PSP4/
ECCP1/P1A
RD5/PSP5/
P1B
RD6/PSP6/
P1C
RD7/PSP7/
P1D
Legend:
Pin Name
PWR = Power Supply, OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input
RD0
PSP0
C1IN+
RD1
PSP1
C1IN-
RD2
PSP2
C2IN+
RD3
PSP3
C2IN-
RD4
PSP4
ECCP1
P1A
RD5
PSP5
P1B
RD6
PSP6
P1C
RD7
PSP7
P1D
Function
PORTD I/O SUMMARY
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TRIS
0
1
x
x
1
0
1
x
x
1
0
1
x
x
1
0
1
x
x
1
0
1
x
x
0
1
0
0
1
X
x
0
0
1
x
x
0
0
1
x
x
0
Buffer
ANA
ANA
ANA
ANA
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
PIC18F2480/2580/4480/4580
LATD<0> data output.
PORTD<0> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<0> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<0> control when enabled).
Comparator 1 positive input B. Default on POR. This analog input overrides the digital
input (read as clear – low level).
LATD<1> data output.
PORTD<1> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<1> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<1> control when enabled).
Comparator 1 negative input. Default on POR. This analog input overrides the digital
input (read as clear – low level).
LATD<2> data output.
PORTD<2> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<2> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<2> control when enabled).
Comparator 2 positive input. Default on POR. This analog input overrides the digital
input (read as clear – low level).
LATD<3> data output.
PORTD<3> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<3> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<3> control when enabled).
Comparator 2 negative input. Default input on POR. This analog input overrides the
digital input (read as clear – low level).
LATD<4> data output.
PORTD<4> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<4> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<4> control when enabled).
ECCP1 compare output.
ECCP1 capture input.
ECCP1 Enhanced PWM output, channel A.
LATD<5> data output.
PORTD<5> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<5> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<5> control when enabled).
ECCP1 Enhanced PWM output, channel B.
LATD<6> data output.
PORTD<6> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<6> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<6> control when enabled).
ECCP1 Enhanced PWM output, channel C.
LATD<7> data output.
PORTD<7> data input.
Parallel Slave Port (PSP) data output (overrides the TRIS<7> control when enabled).
Parallel Slave Port (PSP) data input (overrides the TRIS<7> control when enabled).
ECCP1 Enhanced PWM output, channel D.
Preliminary
Description
DS39637A-page 139