PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 53

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PIC18F2331-E/ML

Manufacturer Part Number
PIC18F2331-E/ML
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
FIGURE 5-7:
TABLE 5-2:
 2010 Microchip Technology Inc.
Power-on Reset
RESET Instruction
Brown-out
MCLR Reset during power-managed
Run modes
MCLR Reset during power-managed Idle
and Sleep modes
WDT Time-out during full power or
power-managed Run modes
MCLR Reset during full-power execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset (STVREN = 1)
Stack Underflow Error (not an actual
Reset, STVREN = 0)
WDT time-out during power-managed Idle
or Sleep modes
Interrupt exit from power-managed modes
Legend:
Note 1:
Note:
INTERNAL RESET
PWRT TIME-OUT
INTERNAL POR
OST TIME-OUT
PLL TIME-OUT
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’.
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
T
T
OST
PLL
MCLR
Condition
 2 ms max. First three stages of the PWRT timer.
V
= 1024 clock cycles.
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
DD
TIME-OUT SEQUENCE ON POR w/PLL ENABLED (MCLR TIED TO V
Program
PC + 2
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
PIC18F2331/2431/4331/4431
(1)
T
PWRT
0--1 1100
0--0 uuuu
0--1 11u-
0--u 1uuu
0--u 10uu
0--u 0uuu
0--u uuuu
u--u uuuu
u--u 00uu
u--u u0uu
Register
RCON
T
OST
RI
1
0
1
u
u
u
u
u
u
u
TO
1
u
1
1
1
0
u
u
0
u
T
PLL
PD
1
u
1
u
0
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
BOR STKFUL STKUNF
0
u
0
u
u
u
u
u
u
u
DS39616D-page 53
DD
0
u
u
u
u
u
u
1
u
u
u
u
)
0
u
u
u
u
u
u
u
1
1
u
u

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