PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 153

• Manufacturer Part Number: PIC18F2331-E/ML
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

17.1
The Input Capture (IC) submodule implements the
following features:
• Three channels of independent input capture
• Edge-Trigger, Period or Pulse-Width
• Programmable prescaler on every input capture
• Special Event Trigger output (IC1 only)
• Selectable noise filters on each capture input
FIGURE 17-2:
 2010 Microchip Technology Inc.
(16-bits/channel) on the CAP1, CAP2 and CAP3
pins
Measurement Operating modes for each channel
channel
Note 1: CAP1BUF register is reconfigured as VELR register when QEI mode is active.
CAP1 Pin
velcap
Input Capture
2: QEI generated velocity pulses, vel_out, are downsampled to produce this velocity capture signal.
(2)
FLTCK<2:0>
VELM
1
0
MUX
Noise
Filter
3
INPUT CAPTURE BLOCK DIAGRAM FOR IC1
Prescaler
1, 4, 16
CAP1M<3:0> Q Clocks
Q Clocks
4
Interrupt
Decode
Select
Mode
Reset/
Clock/
Logic
and
CAP1M<3:0>
PIC18F2331/2431/4331/4431
First Event
Reset
CAP1BUF_clk
Input Channel 1 (IC1) includes a Special Event
Figure
measurement logic. A representative block diagram is
shown in
is Timer5.
Trigger that can be configured for use in Velocity
Measurement mode. Its block diagram is shown in
Special Event Trigger features or additional velocity
Event Trigger
Special
IC1_TR
Reset
IC1IF
17-2. IC2 and IC3 are similar, but lack the
Figure
17-3. Please note that the time base
Timer5 Logic
CAP1BUF/VELR
TMR5
Control
Timer
Reset
DS39616D-page 153
(1)
Reset
Control
Timer5 Reset
Clock
Reset