MC68HC11F1CFN5 MOTOROLA [Motorola, Inc], MC68HC11F1CFN5 Datasheet - Page 65

• Manufacturer Part Number: MC68HC11F1CFN5
• Description: Technical Summary 8-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

Bits[7:6] — See 12.2 Timer Registers, page 62.
PAOVI — Pulse Accumulator Overflow Interrupt Enable
PAII — Pulse Accumulator Interrupt Enable
Bits [3:2] — Not implemented. Reads always return zero and writes have no effect.
Bits [1:0] — See 12.2 Timer Registers, page 62.
TFLG2 — Timer Interrupt Flag 2
Bits [7:6] — See 12.2 Timer Registers, page 62.
PAOVF — Pulse Accumulator Overflow Flag
PAIF — Pulse Accumulator Input Edge Flag
Bits [3:0] — Not implemented. Reads always return zero and writes have no effect.
PACTL — Pulse Accumulator Control
Bit 7 — Not implemented. Reads always return zero and writes have no effect.
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
MC68HC11F1/FC0
MC68HC11FTS/D
RESET:
RESET:
Bits in TFLG2 are cleared by writing a one to the corresponding bit positions.
Set when PACNT rolls over from $FF to $00
Set each time a selected active edge is detected on the PAI input line
This bit has different meanings depending on the state of the PAMOD bit, as shown in Table 33.
0 = Pulse accumulator overflow interrupt disabled
1 = Interrupt requested when PAOVF in TFLG2 is set
0 = Pulse accumulator interrupt disabled
1 = Interrupt requested when PAIF in TFLG2 is set
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
Bit 7
TOF
Bit 7
0
0
0
PAEN
RTIF
6
0
6
0
PAMOD
PAOVF
5
0
5
0
PEDGE
PAIF
4
0
4
0
3
0
0
3
0
0
I4/O5
2
0
0
2
0
RTR1
1
0
0
1
0
RTR0
Bit 0
Bit 0
0
0
0
MOTOROLA
$x025
$x026
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