MC68HC11F1CFN5 MOTOROLA [Motorola, Inc], MC68HC11F1CFN5 Datasheet - Page 34

• Manufacturer Part Number: MC68HC11F1CFN5
• Description: Technical Summary 8-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

7.7 Port G
7.8 Parallel I/O Registers
PORTA — Port A Data Register
DDRA — Port A Data Direction Register
PORTG — Port G Data Register
34
RESET:
Alternate
Function:
And/or:
RESET:
RESET:
Alternate
Function:
MOTOROLA
Port G is an eight-bit general-purpose I/O port with a data register (PORTG) and a data direction register
(DDRG). When enabled, the upper four lines (PG[7:4] can be used as chip-select outputs in expanded
modes. When any of these pins are not being used for chip selects, they can be used for general-pur-
pose I/O. Port G can be configured for wired-OR operation by setting the GWOM bit in the OPT2 reg-
ister.
Port pin function is mode dependent. Do not confuse pin function with the electrical state of the pin at
reset. Port pins are either driven to a specified logic level or are configured as high impedance inputs.
I/O pins configured as high-impedance inputs have port data that is indeterminate. The contents of the
corresponding latches are dependent upon the electrical state of the pins during reset. In port descrip-
tions, an “I” indicates this condition. Port pins that are driven to a known logic level during reset are
shown with a value of either one or zero. Some control bits are unaffected by reset. Reset states for
these bits are indicated with a “U”.
I = Indeterminate value
For DDRx bits, 0 = input and 1 = output.
*These bits are not present on the 64-pin QFP version of the MC68HC11FC0.
I = Indeterminate value
CSPROG
DDA7
Bit 7
OC1
Bit 7
Bit 7
PG7
PA7
PAI
0
I
I
PG[1:0] are not available on the 64-pin MC68HC11FC0.
CSGEN
DDA6
OC2
OC1
PG6
PA6
6
6
0
6
I
I
CSIO1
DDA5
OC3
OC1
PG5
PA5
5
5
0
5
I
I
CSIO2
DDA4
OC4
OC1
PG4
PA4
4
4
0
4
I
I
NOTE
OC5/IC4
DDA3
OC1
PG3
PA3
3
3
0
3
I
I
DDA2
PG2
PA2
IC1
—
2
2
0
2
I
I
DDA1
PG1*
PA1
IC2
—
1
1
0
1
I
I
MC68HC11F1/FC0
DDA0
PG0*
MC68HC11FTS/D
Bit 0
Bit 0
Bit 0
PA0
IC3
—
0
I
I
$x000
$x001
$x002