DP83932C NSC [National Semiconductor], DP83932C Datasheet - Page 9

• Manufacturer Part Number: DP83932C
• Description: MHz SONICTM Systems-Oriented Network Interface Controller
• Manufacturer: NSC [National Semiconductor]

1 0 Functional Description
1 5 STATUS AND CONFIGURATION REGISTERS
The SONIC contains a set of status control registers for
conveying status and control information to from the host
system The SONIC uses these registers for loading com-
mands generated from the system indicating transmit and
receive status buffering data to from memory and provid-
ing interrupt control Each register is 16 bits in length See
Section 4 0 for a description of the registers
1 6 BUS INTERFACE
The system interface (Figure 1-7 ) consists of the pins nec-
essary for interfacing to a variety of buses It includes the
I O drivers for the data and address lines bus access con-
trol for standard microprocessors ready logic for synchro-
nous or asynchronous systems slave access control inter-
rupt control and shared-memory access control The func-
tional signal groups are shown in Figure 1-7 See Section
5 0 for a complete description of the SONIC bus interface
1 7 LOOPBACK AND DIAGNOSTICS
The SONIC furnishes three loopback modes for self-testing
from the controller interface to the transceiver interface
The loopback function is provided to allow self-testing of the
chip’s internal transmit and receive operations During loop-
back transmitted packets are routed back to the receive
section of the SONIC where they are filtered by the address
recognition logic and buffered to memory if accepted
Transmit and receive status and interrupts remain active
during loopback This means that when using loopback it is
as if the packet was transmitted and received by two sepa-
rate chips that are connected to the same bus and memory
MAC Loopback Transmitted data is looped back at the
MAC Data is not sent from the MAC to either the internal
ENDEC or an external ENDEC (the external ENDEC inter-
face pins will not be driven) hence data is not transmitted
from the chip Even though the ENDEC is not used in MAC
loopback the ENDEC clock (an oscillator or crystal for the
(Continued)
FIGURE 1-6 Transmit FIFO
9
internal ENDEC or TXC for an external ENDEC) must be
driven Network activity such as a collision does not affect
MAC loopback CSMA CD MAC protocol is not completely
followed in MAC loopback
ENDEC Loopback Transmitted data is looped back at the
ENDEC If the internal ENDEC is used data is switched
from the transmit section of the ENDEC to the receive sec-
tion ( Figure 1-2 ) Data is not transmitted from the chip and
the collision lines CD
ty does not affect ENDEC loopback The LBK signal from
the MAC tells the internal ENDEC to go into loopback mode
If an external ENDEC is used it should operate in loopback
mode when the LBK signal is asserted CSMA CD MAC
protocol is followed even though data is not transmitted
from the chip
Transceiver Loopback Transmitted data is looped back at
the external transceiver (which is always the case regard-
less of the SONIC’s loopback mode) CSMA CD MAC pro-
tocol is followed since data will be transmitted from the chip
This means that transceiver loopback is affected by network
activity In normal operations the SONIC only monitors the
packet that is looped back by the transceiver but does not
fill the receive FIFO and buffer the packet
1 7 1 Loopback Procedure
The following procedure describes the loopback operation
1 Initialize the Transmit and Receive Area as described in
2 Load one of the CAM address registers (see Section 4 1)
3 Load one of the CAM address registers with the Source
Sections 3 4 and 3 5
with the Destination Address of the packet if you are veri-
fying the SONIC’s address recognition capability
Address of the packet if it is different than the Destination
Address to avoid getting a Packet Monitored Bad (PMB)
error in the Transmit status (see Section 4 3 4)
g
are ignored hence network activi-
TL F 10492 – 7