MPC860DP FREESCALE [Freescale Semiconductor, Inc], MPC860DP Datasheet - Page 11

no-image

MPC860DP

Manufacturer Part Number
MPC860DP
Description
Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC860DPCVR50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860DPCVR66D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860DPCZQ50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860DPCZQ66D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860DPVR50D4
Manufacturer:
FREESCAL
Quantity:
300
Part Number:
MPC860DPVR50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860DPVR80D4
Manufacturer:
ROHM
Quantity:
64
Part Number:
MPC860DPZQ66D4
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MPC860DPZQ80D4
Quantity:
1
7.4 Estimation Using Simulation
When the board temperature is not known, a thermal simulation of the application is needed. The simple two-resistor
model can be used with the thermal simulation of the application [2], or a more accurate and complex model of the
package can be used in the thermal simulation.
7.5 Experimental Determination
To determine the junction temperature of the device in the application after prototypes are available, the thermal
characterization parameter (Ψ
temperature at the top center of the package case using the following equation:
where:
The thermal characterization parameter is measured per JEDEC JESD51-2 specification using a 40 gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so that the
thermocouple junction rests on the package. A small amount of epoxy is placed over the thermocouple junction and
over 1 mm of wire extending from the junction. The thermocouple wire is placed flat against the package case to
avoid measurement errors caused by cooling effects of the thermocouple wire.
7.6 References
8 Layout Practices
Each V
should likewise be provided with a low-impedance path to ground. The power supply pins drive distinct groups of
logic on the chip. The V
located as close as possible to the four sides of the package. The capacitor leads and associated printed circuit traces
connecting to chip V
employing two inner layers as V
Freescale Semiconductor
Semiconductor Equipment and Materials International
805 East Middlefield Rd.
Mountain View, CA 94043
MIL-SPEC and EIA/JESD (JEDEC) Specifications
(Available from Global Engineering Documents)
JEDEC Specifications
1. C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an Automotive
2. B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal Resistance and Its
DD
Ψ
T
P
Engine Controller Module,” Proceedings of SemiTherm, San Diego, 1998, pp. 47–54.
Application in Thermal Modeling,” Proceedings of SemiTherm, San Diego, 1999, pp. 212–220.
D
T
JT
pin on the MPC860 should be provided with a low-impedance path to the board’s supply. Each GND pin
= thermocouple temperature on top of package
= power dissipation in package
= thermal characterization parameter
T
J
= T
DD
T
+ (Ψ
DD
and GND should be kept to less than half an inch per capacitor lead. A four-layer board
power supply should be bypassed to ground using at least four 0.1 µF-bypass capacitors
JT
JT
× P
) can be used to determine the junction temperature with a measurement of the
CC
MPC860 Family Hardware Specifications, Rev. 7
D
and GND planes is recommended.
)
(415) 964-5111
800-854-7179 or
303-397-7956
http://www.jedec.org
Layout Practices
11

Related parts for MPC860DP