MPC8358E_11 FREESCALE [Freescale Semiconductor, Inc], MPC8358E_11 Datasheet - Page 81

• Manufacturer Part Number: MPC8358E_11
• Description: PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

The RCWL[CEVCOD] denotes the QUICC Engine Block PLL VCO internal frequency as shown in
Table
The QUICC Engine block VCO frequency is derived from the following equations:
Freescale Semiconductor
73.
ce_clk = (primary clock input × CEPMF) ÷ (1 + CEPDF)
QE VCO Frequency = ce_clk × VCO divider × (1 + CEPDF)
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
The VCO divider (RCWL[CEVCOD]) must be set properly so that the
QUICC Engine block VCO frequency is in the range of 600–1400 MHz.
The QUICC Engine block frequency is not restricted by the CSB and core
frequencies. The CSB, core, and QUICC Engine block frequencies should
be selected according to the performance requirements.
Table 72. QUICC Engine Block PLL Multiplication Factors (continued)
Note:
1. Reserved modes are not listed.
RCWL[CEPMF] RCWL[CEPDF]
01011
01101
01111
10001
10011
10101
10111
11001
11011
11101
Table 73. QUICC Engine Block PLL VCO Divider
RCWL[CEVCOD]
1
1
1
1
1
1
1
1
1
1
00
01
10
11
NOTE
Multiplication Factor = RCWL[CEPMF]/
VCO Divider
Reserved
(1 + RCWL[CEPDF])
QUICC Engine PLL
4
8
2
× 10.5
× 11.5
× 12.5
× 13.5
× 14.5
× 5.5
× 6.5
× 7.5
× 8.5
× 9.5
Clocking
81