PIC12F1822 MICROCHIP [Microchip Technology], PIC12F1822 Datasheet - Page 126

• Manufacturer Part Number: PIC12F1822
• Description: 8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F/LF1822/16F/LF1823
REGISTER 12-10: ANSELC: PORTC ANALOG SELECT REGISTER
REGISTER 12-11: WPUC: WEAK PULL-UP PORTC REGISTER
TABLE 12-3:
DS41413A-page 126
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
ANSELC
LATC
OPTION_REG
PORTC
TRISC
WPUC
Legend:
Note 1:
Name
U-0
U-0
—
—
2:
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to
allow external control of the voltage on the pin.
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
PIC16F/LF1823 only.
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.
Unimplemented: Read as ‘0’
ANSC<3:0>: Analog Select between Analog or Digital Function on pins RC<3:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
Unimplemented: Read as ‘0’
WPUC<5:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
WPUEN
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Bit 7
—
—
—
—
—
U-0
U-0
—
—
INTEDG
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
—
—
—
—
R/W-1/1
WPUC5
U-0
—
TMR0CS
WPUC5
TRISC5
LATC5
Bit 5
RC5
—
R/W-1/1
WPUC4
U-0
Preliminary
—
TMR0SE
TRISC4
WPUC4
LATC4
Bit 4
RC4
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
WPUC3
R/W-1/1
ANSC3
WPUC3
TRISC3
ANSC3
LATC3
Bit 3
PSA
RC3
(1)
. Digital input buffer disabled.
WPUC2
TRISC2
ANSC2
LATC2
Bit 2
RC2
R/W-1/1
WPUC2
R/W-1/1
ANSC2
(1)
PS<2:0>
TRISC1
WPUC1
ANSC1
LATC1
 2010 Microchip Technology Inc.
Bit 1
RC1
R/W-1/1
ANSC1
R/W-1/1
WPUC1
TRISC0
WPUC0
ANSC0
LATC0
Bit 0
RC0
R/W-1/1
ANSC0
R/W-1/1
WPUC0
Register
on Page
126
125
171
125
125
126
bit 0
bit 0