KSZ8895 INFINEON [Infineon Technologies AG], KSZ8895 Datasheet - Page 53
KSZ8895
Manufacturer Part Number
KSZ8895
Description
Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII interface
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.KSZ8895.pdf
(115 pages)
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KSZ8895MQ/RQ/FMQ
SMI register Read access is selected when OP Code is set to “10” and bits [2:1] of the PHY address is set to ‘11’.
SMI register Write access is selected when OP Code is set to “01” and bits [2:1] of the PHY address is set to ‘11’.
The 8-bit register address is the concatenation of {PHY address bits [4:3], PHY address bits [0], REG address
bit[4:0]}. Since the switch configuration registers are 8-bit wide, only the lower 8 bits of Data Bits [15:0] are used.
To access the KSZ8895MQ/RQ/FMQ registers 0-255 (0x00 – 0xFF), the following applies:
PHYAD [4,3,0] and REGAD [4:0] are concatenated to form the 8-bit address; that is, {PHYAD[4,3,0], REGAD[4:0]} =
bits [7:0] of the 8-bit address.
Registers are 8 data bits wide. For read operation, data bits [15:8] are read back as 0’s. For write operation, data bits
[15:8] are not defined, and hence can be set to either 0’s or 1’s.
SMI register access is the same as the MIIM register access, except for the register access requirements presented
in this section.
53
January 2011
M9999-012011-1.2