KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 38

• Manufacturer Part Number: KSZ8851-16MLLJ_10
• Description: Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel, Inc.
KSZ8851-16MLLJ
CPU Interface I/O Registers
The KSZ8851-16MLLJ provides an SRAM-like asynchronous bus interface for the CPU to access its internal I/O registers.
I/O registers serve as the address that the microprocessor uses when communicating with the device. This is used for
configuring operational settings, reading or writing control, status information, and transferring packets. The KSZ8851-
16MLLJ can be programmed to interface with either Big-Endian or Little-Endian processor.
I/O Registers
The following I/O Space Mapping Tables apply to 8 or 16-bit bus interface. Depending upon the bus mode selected, each
I/O access can be performed the following operations:
In 8-bit bus mode, there are 256 address locations which is based on SD[7:0] for address when CMD=1. The SD[7:0] is
for data when CMD=0.
In 16-bit bus mode, there are 64 address locations which is based on SD[7:2] ([1:0] is “don’t care”) for address and
SD[15:12] for Byte Enable BE[3:0] (either one byte or two bytes) when CMD=1. The SD[15:0] is for data when CMD=0.
March 2010
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M9999-030210-1.0