SAA7124WP PHILIPS [NXP Semiconductors], SAA7124WP Datasheet - Page 23

• Manufacturer Part Number: SAA7124WP
• Description: Digital Video Encoder ECO-DENC
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 18 Subaddress 6B
Table 19 Logic levels and function of SRCV1
1996 Nov 07
PRCV2
ORCV2
CBLF
PRCV1
ORCV1
TRCV2
SRCV1
DATA BYTE
Digital Video Encoder (ECO-DENC)
SRCV11
0
0
1
1
DATA BYTE
LOGIC LEVEL
SRCV10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval); default
after reset
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = HIGH); default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘Composite-Blanking-Not’ signal, this is a
reference pulse that is defined by RCV2S and RCV2E, excluding Vertical Blanking
Interval, which is defined by FAL and LAL
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = HIGH) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input; default
after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from
decoded frame sync of “CCIR 656” input (at bit SYMP = HIGH); default after reset
horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
defines signal type on pin RCV1; see Table 19
not applicable
AS OUTPUT
FSEQ
VS
FS
not applicable
AS INPUT
FSEQ
VS
FS
23
DESCRIPTION
vertical sync each field; default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0) or eighth field (PAL = 1)
SAA7124; SAA7125
FUNCTION
Preliminary specification