SAA7124WP PHILIPS [NXP Semiconductors], SAA7124WP Datasheet - Page 13

no-image

SAA7124WP

Manufacturer Part Number
SAA7124WP
Description
Digital Video Encoder ECO-DENC
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
FUNCTIONAL DESCRIPTION
The digital video encoder (ECO-DENC) encodes digital
luminance and colour difference signals into analog CVBS
and simultaneously RGB signals. NTSC-M, PAL B/G
standards and sub-standards are supported.
Both interlaced and non-interlaced operation is possible
for all standards.
Optionally, the input Y, Cb and Cr data, digital-to-analog
converted, is available at the analog RGB outputs.
For applications that do not require RGB output, the device
can be configured in such a way that S-Video and twice
CVBS is available (Y at CVBS-DAC, C at R-DAC, and
CVBS at G-DAC and B-DAC).
The basic encoder function consists of subcarrier
generation, colour modulation and insertion of
synchronization signals. Luminance and chrominance
signals are filtered in accordance with the standard
requirements of “RS-170-A” and “CCIR 624” .
For ease of analog post filtering the signals are twice
oversampled with respect to the pixel clock before
digital-to-analog conversion.
For total filter transfer characteristics see
Figs 7, 8, 9, 10, 11 and 12. The DACs for Y, C, and CVBS
are realized with full 10-bit resolution, DACs for RGB with
9-bit resolution.
The MPEG port (MP) accepts 8 line multiplexed Cb, Y, Cr
data.
The 8-bit multiplexed Cb-Y-Cr formats are “CCIR 656”
(D1 format) compatible, but auxiliary codes such as SAV
and EAV are decoded optionally for trigger purposes.
A crystal-stable master clock (LLC) of 27 MHz, which is
twice the CCIR line-locked pixel clock of 13.5 MHz, needs
to be supplied externally. Optionally, a crystal oscillator
input/output pair of pins and an on-chip clock driver is
provided.
It is also possible to connect a Philips Digital Video
Decoder (SAA7111 or SAA7151B) in conjunction with a
CREF clock qualifier to ECO-DENC. Via the RTCI pin,
connected to RTCO of a decoder, information concerning
actual subcarrier, PAL-ID, and if connected to SAA7111,
definite subcarrier phase can be inserted.
The ECO-DENC synthesizes all necessary internal
signals, colour subcarrier frequency, and synchronization
signals, from that clock.
1996 Nov 07
Digital Video Encoder (ECO-DENC)
13
The encoder can be configured as slave with respect to
RCV trigger inputs or auxiliary “CCIR 656” codes, or can
be master to output horizontal and vertical trigger pulses.
The IC also contains Closed Caption and Extended Data
Services Encoding (Line 21), and supports anti-taping
signal generation in accordance with Macrovision.
A number of possibilities are provided for setting different
video parameters such as:
During reset (RESET = LOW) and after reset is released,
all digital I/O stages are set to input mode. A reset forces
the I
sets register 3A to 03H, register 61 to 06H and
registers 6BH and 6EH to 00H. All other control registers
are not influenced by a reset.
Data manager
In the data manager, real time arbitration on the data
stream to be encoded is performed.
Optionally, the device can operate as a 100/75 colour bar
test pattern generator without need for an external data
source.
Encoder
V
The encoder generates out of Y, U and V baseband
signals luminance and colour subcarrier output signals,
suitable for use as CVBS or separate Y and C signals.
Luminance is modified in gain and in offset (latter
programmable in a certain range to enable different black
level set-ups). After having been inserted a fixed
synchronization level, in accordance with standard
composite synchronization schemes, and blanking level,
programmable also in a certain range to allow for
manipulations with Macrovision anti-taping, additional
insertion of AGC super-white pulses, programmable in
height, is supported.
In order to enable easy analog post filtering, luminance is
interpolated from 13.5 MHz data rate to 27 MHz data rate,
providing luminance in 10-bit resolution. This filter is also
used to define smoothed transients for synchronization
pulses and blanking period. For transfer characteristic of
the luminance interpolation filter see Figs 9 and 10.
IDEO PATH
Black and blanking level control
Colour subcarrier frequency
Variable burst amplitude etc.
2
C-bus interface to abort any running bus transfer and
SAA7124; SAA7125
Preliminary specification

Related parts for SAA7124WP