ADSP-BF522 AD [Analog Devices], ADSP-BF522 Datasheet - Page 45

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ADSP-BF522

Manufacturer Part Number
ADSP-BF522
Description
Blackfin Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet

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Preliminary Technical Data
External DMA Request Timing
Table 35
operations.
Table 35. External DMA Request Timing
1
Parameter
Timing Parameters
t
t
t
t
Because the external DMA control pins are part of the V
DR
DH
DMARACT
DMARINACT
V
DDMEM
are NOT equal may require level shifting logic for correct operation.
and
Figure 18
(Active High)
(Active Low)
DMAR0/1
DMAR0/1
CLKOUT
DMARx Asserted to CLKOUT High Setup
CLKOUT High to DMARx Deasserted Hold Time
DMARx Active Pulse Width
DMARx Inactive Pulse Width
describe the External DMA Request
t
DR
t
t
DMARACT
DMARACT
DDEXT
Rev. PrG | Page 45 of 80 | February 2009
power domain and the CLKOUT signal is part of the V
Figure 18. External DMA Request Timing
t
DH
t
t
DMARINACT
DMARINACT
1.75 t
1.0 t
V
DDEXT
Min
8.0
0.0
ADSP-BF522/523/524/525/526/527
SCLK
/V
SCLK
DDMEM
= 1.8 V
Max
DDMEM
1
power domain, systems in which V
V
1.75 t
1.0 t
DDEXT
Min
6.0
0.0
/V
SCLK
SCLK
DDMEM
= 2.5/3.3 V
Max
DDEXT
Unit
ns
ns
ns
ns
and

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