ADSP-2191 AD [Analog Devices], ADSP-2191 Datasheet - Page 25

• Manufacturer Part Number: ADSP-2191
• Description: DSP Microcomputer
• Manufacturer: AD [Analog Devices]

External Port Bus Request and Grant Cycle Timing
Table 14
Table 14. External Port Bus Request and Grant Cycle Timing
1
2
REV. 0
t
These are timing parameters that are based on worst-case operating conditions.
HCLK
Parameter
Switching Characteristics
t
t
t
t
t
t
Timing Requirements
t
t
SD
SE
DBG
EBG
DBH
EBH
BS
BH
is the peripheral clock period.
and
CLK OUT
1, 2
A 21–0
Figure 13
MS3–0
IOMS
BMS
BGH
WR
BG
BR
RD
CLKOUT High to xMS, Address, and RD/WR Disable
CLKOUT Low to xMS, Address, and RD/WR Enable
CLKOUT High to BG Asserted Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH Asserted Setup
CLKOUT High to BGH Deasserted Hold Time
BR Asserted to CLKOUT High Setup
CLKOUT High to BR Deasserted Hold Time
describe external port bus request and bus grant operations.
t
B S
Figure 13. External Port Bus Request and Grant Cycle Timing
t
B H
–25–
t
t
t
t
t
S D
D B G
S D
S D
D B H
Min
0
0
0
0
0
4.6
0
Max
0.5t
4
4
4
4
4
ADSP-2191M
HCLK
t
t
E B G
E B H
+1
t
t
t
S E
S E
S E
Unit
ns
ns
ns
ns
ns
ns
ns
ns