ADSP-2191 AD [Analog Devices], ADSP-2191 Datasheet - Page 13

• Manufacturer Part Number: ADSP-2191
• Description: DSP Microcomputer
• Manufacturer: AD [Analog Devices]

synchronizer and arbitration delays, bus grants will be provided
with a minimum of three peripheral clock delays. ADSP-2191M
DSPs will respond to the bus grant by:
The ADSP-2191M will halt program execution if the bus is
granted to an external device and an instruction fetch or data
read/write request is made to external general-purpose or periph-
eral memory spaces. If an instruction requires two external
memory read accesses, bus requests will not be granted between
the two accesses. If an instruction requires an external memory
read and an external memory write access, the bus may be
granted between the two accesses. The external memory
interface can be configured so that the core will have exclusive
use of the interface. DMA and Bus Requests will be granted.
When the external device releases BR, the DSP releases BG and
continues program execution from the point at which it stopped.
The bus request feature operates at all times, even while the DSP
is booting and RESET is active.
The ADSP-2191M asserts the BGH pin when it is ready to start
another external port access, but is held off because the bus was
previously granted. This mechanism can be extended to define
more complex arbitration protocols for implementing more
elaborate multimaster systems.
Instruction Set Description
The ADSP-2191M assembly language instruction set has an
algebraic syntax that was designed for ease of coding and read-
ability. The assembly language, which takes full advantage of the
processor’s unique architecture, offers the following benefits:
REV. 0
Three-stating the data and address buses and the MS3–0,
BMS, IOMS, RD, and WR output drivers.
Asserting the bus grant (BG) signal.
ADSP-219x assembly language syntax is a superset of and
source-code-compatible (except for two data registers
and DAG base address registers) with ADSP-218x family
syntax. It may be necessary to restructure ADSP-218x
programs to accommodate the ADSP-2191M’s unified
memory space and to conform to its interrupt vector map.
The algebraic syntax eliminates the need to remember
cryptic assembler mnemonics. For example, a typical
arithmetic add instruction, such as AR = AX0 + AY0,
resembles a simple equation.
Every instruction, but two, assembles into a single, 24-bit
word that can execute in a single instruction cycle. The
exceptions are two dual word instructions. One writes 16-
or 24-bit immediate data to memory, and the other is an
absolute jump/call with the 24-bit address specified in the
instruction.
Multifunction instructions allow parallel execution of an
arithmetic, MAC, or shift instruction with up to two
fetches or one write to processor memory space during a
single instruction cycle.
Program flow instructions support a wider variety of con-
ditional and unconditional jumps/calls and a larger set of
conditions on which to base execution of conditional
instructions.
–13–
Development Tools
The ADSP-2191M is supported with a complete set of software
and hardware development tools, including Analog Devices
emulators and VisualDSP++® development environment. The
same emulator hardware that supports other ADSP-219x DSPs,
also fully emulates the ADSP-2191M.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy-to-use assembler that is based on an algebraic
syntax; an archiver (librarian/library builder), a linker, a loader,
a cycle-accurate instruction-level simulator, a C/C++ compiler,
and a C/C++ run-time library that includes DSP and mathemat-
ical functions. Two key points for these tools are:
Debugging both C/C++ and assembly programs with the Visu-
alDSP++ debugger, programmers can:
The VisualDSP++ IDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the ADSP-219x
development tools, including the syntax highlighting in the Visu-
alDSP++ editor. This capability permits:
Analog Devices DSP emulators use the IEEE 1149.1 JTAG test
access port of the ADSP-2191M processor to monitor and
control the target board processor during emulation. The
emulator provides full-speed emulation, allowing inspection and
modification of memory, registers, and processor stacks. Nonin-
trusive in-circuit emulation is assured by the use of the processor’s
JTAG interface—the emulator does not affect target system
loading or timing.
Compiled ADSP-219x C/C++ code efficiency—the
compiler has been developed for efficient translation of
C/C++ code to ADSP-219x assembly. The DSP has
architectural features that improve the efficiency of
compiled C/C++ code.
ADSP-218x family code compatibility—The assembler
has legacy features to ease the conversion of existing
ADSP-218x applications to the ADSP-219x.
View mixed C/C++ and assembly code (interleaved
source and object information)
Insert break points
Set conditional breakpoints on registers, memory, and
stacks
Trace instruction execution
Perform linear or statistical profiling of program
execution
Fill, dump, and graphically plot the contents of memory
Source level debugging
Create custom debugger windows
Control how the development tools process inputs and
generate outputs.
Maintain a one-to-one correspondence with the tool’s
command line switches.
ADSP-2191M