DSP56001FE33 MOTOROLA [Motorola, Inc], DSP56001FE33 Datasheet - Page 58

• Manufacturer Part Number: DSP56001FE33
• Description: 24-Bit General Purpose Digital Signal Processor
• Manufacturer: MOTOROLA [Motorola, Inc]

MOTOROLA
E-58
The bootstrap feature of the DSP56001 consists of four special
on-chip modules: the 512 words of PRAM, a 32-word bootstrap
ROM, the bootstrap control logic, and the bootstrap firmware
program.
BOOTSTRAP ROM
This 32-word on-chip ROM has been factory programmed to per-
form the actual bootstrap operation from the memory expansion
port (Port A) or from the Host Interface. You have no access to
the bootstrap ROM other than through the bootstrap process.
Control logic will disable the bootstrap ROM during normal oper-
ations.
BOOTSTRAP CONTROL LOGIC
The bootstrap mode control logic is activated when the
DSP56001 is placed in Operating Mode 1. The control logic
maps the bootstrap ROM into program memory space as long as
the DSP56001 remains in Operating Mode 1. The bootstrap firm-
ware changes operating modes when the bootstrap load is com-
pleted. When the DSP56001 exits the reset state in Mode 1, the
following actions occur.
1.
2.
3.
4.
You may also select the bootstrap mode by writing Operating
Mode 1 into the OMR. This initiates a timed operation to map the
bootstrap ROM into the program address space after a delay to
allow execution of a single cycle instruction and then a JMP
#<00 (e.g., see Bootstrap code for DSP56001) to begin the boot-
strap process as described above in steps 1-4. This technique
allows the DSP56001 user to reboot the system (with a different
program if desired).
BOOTSTRAP FIRMWARE PROGRAM
Bootstrap ROM contains the bootstrap firmware program that
performs initial loading of the DSP56001 PRAM. The program is
written in DSP56000/DSP56001 assembly language. It contains
two separate methods of initializing the PRAM: loading from a
byte-wide memory starting at location P:$C000 or loading
The control logic maps the bootstrap ROM into the inter-
nal DSP program memory space starting at location
$0000. This P: space is read-only.
The control logic forces the entire P: space to be write-
only memory during the bootstrap loading process. At-
tempts to read from this space will result in fetches from
the read-only bootstrap ROM.
Program execution begins at location $0000 in the boot-
strap ROM. The bootstrap ROM program is able to per-
form the PRAM load through either the memory expan-
sion port from a byte-wide external memory, or through
the Host Interface.
The bootstrap ROM program executes the following se-
quence to end the bootstrap operation and begin your
program execution.
A.
B.
Enter Operating Mode 2 by writing to the OMR.
This action will be timed to remove the bootstrap
ROM from the program memory map and re-en-
able read/write access to the PRAM.
The change to Mode 2 is timed exactly to allow
the boot program to execute a single cycle in-
struction then a JMP #00 and begin execution of
the program at location $0000.
BOOTSTRAP MODE — OPERATING MODE 1
APPENDIX E
through the Host Interface. The particular method used is select-
ed by the level of program memory location $C000, bit 23. If lo-
cation P:$C000, bit 23 is read as a one, the external bus version
of the bootstrap program will be selected. Typically, a byte wide
EPROM will be connected to the DSP56001 Address and Data
Bus as shown in Figure B-1 of the applications examples given
in APPENDIX B APPLICATIONS EXAMPLES. The data con-
tents of the EPROM must be organized as shown below.
If location P:$C000, bit 23 is read as a zero, the Host Interface
version of the bootstrap program will be selected. Typically a
host microprocessor will be connected to the DSP56001 Host In-
terface. The host microprocessor must write the Host Interface
registers THX, TXM, and then TSL with the desired contents of
PRAM from location P:$0000 up to P:$01FF. If less than 512
words are to be loaded, the host programmer can exit the boot-
strap program and force the DSP56001 to begin executing at lo-
cation P:$0000 by setting HF0=1 in the Host Interface during the
bootstrap load. In most systems, the DSP56001 responds so
fast that handshaking between the DSP56001 and the host is not
necessary.
The bootstrap program is shown in flowchart form in Figure E-1
and in assembler listing format in Figure E-2.
Byte Wide P Memory
Address of External
P:$C000
P:$C001
P:$C002
P:$C5FD
P:$C5FE
P:$C5FF
•
•
•
P:$0000 low byte
P:$0000 mid byte
P:$0000 high byte
P:$01FF low byte
P:$01FF mid byte
P:$01FF high byte
to Internal PRAM at:
Contents Loaded
•
•
•
DSP56001