AD7277BRM AD [Analog Devices], AD7277BRM Datasheet - Page 4

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AD7277BRM

Manufacturer Part Number
AD7277BRM
Description
3MSPS,12-/10-/8-Bit ADCs in 6-Lead TSOT
Manufacturer
AD [Analog Devices]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7277BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
POWER REQUIREMENTS
AD7276-SPECIFICATIONS
N O T E S
1
2
3
4
Specifications subject to change without notice.
Input Low Voltage, V
Input Current, I
Output Coding
Temperature range from –40°C to +85°C.
See Terminology.
Guranteed by Characterization.
See Power Versus Throughput Rate section.
Input High Voltage, V
Output High Voltage, V
Input Current, I
Input Capacitance, C
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Conversion
Track/Hold Acquisition Time
Throughput Rate
Signal-to-Noise + Distortion (SINAD)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
Gain Error
Total Unadjusted Error (TUE)
DC Leakage Current
Input Capacitance
V
I
Input Voltage Ranges
Offset Error
Power Dissipation
D D
Full Power-Down Mode(Dynamic)
DD
Full Power-Down
Normal Mode(Static)
Normal Mode (Operational)
Full Power-Down Mode(Static)
Normal Mode (Operational)
Second Order Terms
Third Order Term
2
2
Time
IN
IN
,SCLK Pin
, CS Pin
4
INL
INH
IN
2
OH
3
OL
2
2
2
PRELIMINARY TECHNICAL DATA
3
2
2
2
2
B Grade
Straight (Natural) Binary
V
2.35/3.6
0 to V
0.7(V
0.2(V
DD
1
-80
-82
-84
-84
T B D
T B D
± 1
± 1
± T B D
± T B D
± T B D
±0.5
2
0.8
± T B D
0.2
10
270
50
3
2.5
T B D
13.5
3
T B D
T B D
4.5
±0.5
(V
T
70
71
12
10
±1
TBD
A
- 0.2
=T
DD
DD
DD
=+2.35 V to +3.6 V, f
MIN
DD
1
)
)
to T
–4–
dB min
dB min
dB typ
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ @ 3 dB
MHz typ @ 0.1dB
Bits
LSB max
LSB max Guaranteed No Missed Codes to 12 Bits
LSB max
LSB max
LSB max
µA max
pF typ
µA max
pF max
MSPS max See Serial Interface Section
V min/max
MAX
ns max
V min
V min
V max
V max
µA max
pF max
V min
V max
ns max
Volts
µA max
µA max
mA typ
mA max
mA typ
mW max
µW max
, unless otherwise noted.)
Units
14 SCLK Cycles with SCLK at 52 MHz
f
fa= TBD kHz, fb= TBD kHz
fa= TBD kHz, fb= TBD kHz
2.35V Vdd 2.7V
2.7V < Vdd
2.35V Vdd< 2.7V
2.7V
Typically TBDnA, V
I
I
SCLK
IN
SOURCE
SINK
SCLK On or Off, typically TBD nA
V
V
V
Digital I/Ps 0V or V
V
DD
V
DD
DD
=52 MHz, f
DD
= 1 MHz Sine Wave
DD
=200 µA
= 2.35V to 3.6V, f
=3V
= 2.35V to 3.6V, SCLK On or Off
Test Conditions/Comments
= 3V, f
= 3V, f
= 200 µA;V
Vdd
SAMPLE
SAMPLE
SAMPLE
3.6V
3.6V
=3MSPS unless otherwise noted;
DD
= 1MSPS
= 3MSPS
IN
DD
= 2.35 V to 3.6V
= 0 V or V
SAMPLE
= 3MSPS
DD
REV. PrF

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