AD7277BRM AD [Analog Devices], AD7277BRM Datasheet - Page 2

• Manufacturer Part Number: AD7277BRM
• Description: 3MSPS,12-/10-/8-Bit ADCs in 6-Lead TSOT
• Manufacturer: AD [Analog Devices]

N O T E S
1
2
3
4
Specifications subject to change without notice.
AD7278-SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
POWER REQUIREMENTS
Temperature range from –40°C to +85°C.
See Terminology.
Guaranteed by characterization.
See Power Versus Throughput Rate section.
Output Low Voltage, V
Floating-State Output Capacitance
Floating-State Leakage Current
Signal-to-Noise + Distortion (SINAD)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error (TUE)
Input Voltage Ranges
DC Leakage Current
Input Capacitance
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Coding
I
Power Dissipation
V
Throughput Rate
Conversion Time
Track/Hold Acquisition Time
D D
DD
Normal Mode (Operational)
Full Power-Down
Full Power-Down Mode (Static)
Normal Mode(Static)
Normal Mode (Operational)
Second Order Terms
Third Order Terms
Full Power-Down Mode (Dynamic)
2
2
IN
IN
, CS Pin
, SCLK Pin
4
2
IN
INL
INH
OH
OL
3
2
2
2
2
PRELIMINARY TECHNICAL DATA
3
2
2
2
B Grade
2.35/3.6
Straight (Natural) Binary
V
0 to V
0.7(V
2
0.2(V
0.8
±0.5
± T B D
10
0.2
± 1
10
192
50
3
2.5
4.5
T B D
13.5
3
1
DD
-65
-76
-76
-65
49
T B D
T B D
T B D
T B D
8
±0.3
±0.3
±0.5
± T B D
±0.5
± T B D
± T B D
±0.5
T B D
(V
T
A
- 0.2
=T
DD
=+2.35 V to +3.6 V, f
MIN
1
DD
DD
DD
to T
)
)
–2–
Units
MAX
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
µA max
pF typ
V min
V min
V max
V max
µA max
µA max
pF max
V min
V max
µA max
pF max
ns max
ns max
MSPS max
Vmin/max
mA typ
mA max
mA typ
mW max
µW max
µA max
, unless otherwise noted.)
Bits
Volts
SCLK
=52 MHz, f
f
fa= TBD kHz, fb= TBD kHz
fa= TBD kHz, fb= TBD kHz
@ 3 dB
@ 0.1dB
Guaranteed No Missed Codes to 8 Bits
2.35V Vdd
2.7V < Vdd
2.35V Vdd< 2.7V
2.7V
Typically TBD nA, V
I
I
10 SCLK Cycles with SCLK at 52 MHz
Digital I/Ps= 0V or V
V
V
V
V
V
SCLK On or Off, typically TBD nA
Test Conditions/Comments
IN
SOURCE
SINK
DD
DD
DD
DD
DD
= 1MHz Sine Wave
= 2.35V to 3.6V, SCLK On or Off
= 2.35V to 3.6V, f
= 3V, f
= 3V, f
= 3V
= 200µA
= 200 µA,V
Vdd
SAMPLE
SAMPLE
SAMPLE
=3 MSPS unless otherwise noted;
3.6V
2.7V
3.6V
DD
= 1MSPS
= 3MSPS
= 2.35 V to 3.6V
IN
DD
= 0 V or V
SAMPLE
= 3MSPS
REV. PrF
DD