AD7277BRM AD [Analog Devices], AD7277BRM Datasheet

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AD7277BRM

Manufacturer Part Number
AD7277BRM
Description
3MSPS,12-/10-/8-Bit ADCs in 6-Lead TSOT
Manufacturer
AD [Analog Devices]
Datasheet
1.AD7277BRM.pdf (20 pages)

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Quantity
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Company:
Meier Automation Equipment Co., Limited Meier Automation Equipment Co., Limited
Part Number:
AD7277BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
Fast Throughput Rate: 3MSPS
Specified for V
Low Power:
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
Power Down Mode: 1µA max
6-Lead TSOT Package
8-lead MSOP Package
AD7476 and AD7476A pin compatible
APPLICATIONS
Battery-Powered Systems
Instrumentation and Control Systems
Data Acquisition Systems
High-Speed Modems
Optical Sensors
GENERAL DESCRIPTION
The AD7276/AD7277/AD7278 are 12-bit, 10-bit and 8-
bit, high speed, low power, successive-approximation
ADCs respectively. The parts operate from a single 2.35V
to 3.6 V power supply and feature throughput rates up to 3
MSPS. The parts contain a low-noise, wide bandwidth
track/hold amplifier which can handle input frequencies in
excess of TBD MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to
interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and the conversion is
also initiated at this point. There are no pipeline delays
associated with the part.
The AD7276/AD7277/AD7278 use advanced design
techniques to achieve very low power dissipation at high
throughput rates.
The reference for the part is taken internally from V
This allows the widest dynamic input range to the ADC.
Thus the analog input range for the part is 0 to V
conversion rate is determined by the SCLK.
REV. PrF (6/04)
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.Trademarks
and registered tradermarks are the property of their respective companies.
Preliminary Technical Data
13.5 mW max at 3MSPS with 3V Supplies
TBD mW typ at 1.5MSPS with 3V Supplies
Wide Input Bandwidth:
70dB SNR at 1MHz Input Frequency
Personal Digital Assistants
Medical Instruments
Mobile Communications
SPI
TM
/QSPI
TM
DD
/MICROWIRE
of 2.35 V to 3.6V
TM
/DSP Compatible
DD
. The
DD.
One Technology Way, P .O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
PRODUCT HIGHLIGHTS
1. 3MSPS ADCs in a 6-lead TSOT package.
2. AD7476/77/78 and AD7476A/77A/78A pin compatible.
3. High Throughput with Low Power Consumption.
4. Flexible Power/Serial Clock Speed Management.
5. Reference derived from the power supply.
6. No Pipeline Delay.
allowing the conversion time to be reduced through the
serial clock speed increase. This allows the average
power consumption to be reduced when a power-down
mode is used while not converting. The part also
features a power-down mode to maximize power effi-
ciency at lower throughput rates. Current consumption is
1
The parts feature a standard successive-approximation
ADC with accurate control of the sampling instant via a
CS input and once-off conversion control.
The conversion rate is determined by the serial clock
A max when in Power-Down mode.
V
IN
FUNCTIONAL BLOCK DIAGRAM
AD7276/AD7277/AD7278
AD7276/AD7277/AD7278
T/H
World Wide Web Site: http://www.analog.com
ADCs in 6-Lead TSOT
3MSPS,12-/10-/8-Bit
APPROXIMATION
SUCCESSIVE
8-/10-/12-BIT
CONTROL
LOGIC
V
ADC
GND
DD
Analog Devices, Inc., 2004
SCLK
SDATA
&6

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AD7277BRM Summary of contents

Page 1

Preliminary Technical Data FEATURES Fast Throughput Rate: 3MSPS Specified for 3.6V DD Low Power: 13.5 mW max at 3MSPS with 3V Supplies TBD mW typ at 1.5MSPS with 3V Supplies Wide Input Bandwidth: 70dB SNR ...

Page 2

PRELIMINARY TECHNICAL DATA AD7278-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Aperture Delay Aperture Jitter Full Power Bandwidth Full Power ...

Page 3

PRELIMINARY TECHNICAL DATA AD7277-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Aperture Delay Aperture Jitter Full Power Bandwidth Full Power ...

Page 4

PRELIMINARY TECHNICAL DATA AD7276-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) Signal-to-Noise Ratio (SNR) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Term Aperture Delay Aperture Jitter Full Power Bandwidth ...

Page 5

PRELIMINARY TECHNICAL DATA Preliminary Technical Data TIMING SPECIFICATIONS Limit MIN MAX Parameter AD7276/AD7277/AD7278 SCLK CONVERT SCLK SCLK SCLK ...

Page 6

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Figures 5 and 6 show some of the timing parameters from the Timing Specifications table. & SCLK ZERO DB11 SDATA THREE- 2 LEADING STATE ZERO’S Timing Example 1 ...

Page 7

... Model Range AD7276BUJ-REEL –40°C to +85°C AD7276BRM –40°C to +85°C AD7277BUJ-REEL –40°C to +85°C AD7277BRM –40°C to +85°C AD7278BUJ-REEL –40°C to +85°C AD7278BRMJ –40°C to +85° Linearity error here refers to integral nonlinearity. ...

Page 8

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Pin Mnemonic Function C S Chip Select. Active low logic input. This input provides the dual function of initiating conversion on the AD7276/AD7277/AD7278 and also frames the serial data transfer. V Power Supply Input. The V ...

Page 9

PRELIMINARY TECHNICAL DATA Preliminary Technical Data TERMINOLOGY Integral Nonlinearity This is the maximum deviation from a straight line pass- ing through the endpoints of the ADC transfer function. For the AD7276/AD7277/AD7278, the endpoints of the transfer function are zero scale, ...

Page 10

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 PERFORMANCE CURVES Dynamic Performance curves TPC 1, TPC 2 and TPC 3 show typical FFT plots for the AD7276, AD7277 and AD7278 respectively MSPS sample rate and TBD KHz input tone. TPC 4 shows ...

Page 11

PRELIMINARY TECHNICAL DATA Preliminary Technical Data TBD 0 0 TITLE TPC 3. AD7278 Dynamic performance at 3 MSPS TBD 0 0 TITLE TPC 4. AD7276 SINAD vs Analog Input Frequency at 3 MSPS for various Supply Voltages TBD 0 0 ...

Page 12

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 TBD 0 0 TITLE TPC 9. AD7276 DNL performance Preliminary Technical Data TBD 0 0 TITLE TPC 10. Maximum current vs Supply voltage for different SCLK frequencies. –12– REV. PrF ...

Page 13

PRELIMINARY TECHNICAL DATA Preliminary Technical Data CIRCUIT INFORMATION The AD7276/AD7277/AD7278 are fast, micropower, 12-/ 10-/8-Bit, single supply, A/D converters respectively. The parts can be operated from a +2.35V to +3.6V supply. When operated from any supply voltage within this range, ...

Page 14

AD7276/AD7277/AD7278 TYPICAL CONNECTION DIAGRAM Figure 10 shows a typical connection diagram for the AD7276/AD7277/AD7278 taken internally from REF V and as such V should be well decoupled. This DD DD provides an analog input range ...

Page 15

PRELIMINARY TECHNICAL DATA Preliminary Technical Data Table II provides some typical performance data with various op-amps used as the input buffer under the same set-up conditions. Op-amp in the AD7276 SNR Performance input buffer TBD kHz Input AD8510 TBD dB ...

Page 16

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Power-Down Mode This mode is intended for use in applications where slower throughput rates are required; either the ADC is powered down between each conversion series of conversions may be performed at a high ...

Page 17

PRELIMINARY TECHNICAL DATA Preliminary Technical Data Power-up Time The power-up time of the AD7276/AD7277/AD7278 is TBD ns, which means that with any frequency of SCLK MHz, one dummy cycle will always be sufficient to allow the device ...

Page 18

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 SERIAL INTERFACE Figures 16, 17 and 18 show the detailed timing diagram for serial interfacing to the AD7276, AD7277 and AD7278 respectively. The serial clock provides the conversion clock and also controls the transfer of information ...

Page 19

PRELIMINARY TECHNICAL DATA Preliminary Technical Data & SCLK DB9 Z ZERO SDATA THREE- STATE 2 LEADI NG ZERO’S & SCLK ZERO DB7 SDATA THREE- 2 LEADI NG ...

Page 20

PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 6-Lead Thin Small Outline Transistor Package [TSOT BSC PIN .10 MAX COMPLIANT TO JEDEC STANDARDS MO-193AA 0.006 (0.15) 0.002 (0.05) COMPLIANT TO ...

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