AD9253-125EBZ AD [Analog Devices], AD9253-125EBZ Datasheet - Page 34

• Manufacturer Part Number: AD9253-125EBZ
• Description: Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
• Manufacturer: AD [Analog Devices]

MEMORY MAP REGISTER TABLE
The
therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and Bit 3
and Bit 4 are set to 1. When Bit 5 in Register 0x00 is set high,
Table 17.
ADDR
(Hex)
Chip Configuration Registers
0x00
0x01
0x02
Device Index and Transfer Registers
0x05
0xFF
Global ADC Function Registers
0x08
0x09
AD9253
AD9253
Parameter Name
SPI port
configuration
Chip ID (global)
Chip grade
(global)
Device index
Transfer
Power modes
(global)
Clock (global)
uses a 3-wire interface and 16-bit addressing and,
Bit 7
(MSB)
0 =
SDO
active
Open
Open
Open
Open
Open
Bit 6
LSB first
Open
Open
Open
Open
AD9253
Speed grade ID[6:4]
101 = 105 MSPS
110 = 125 MSPS
0x8F = quad 14-bit 80 MSPS/105 MSPS/125 MSPS serial LVDS
100 = 80 MSPS
Bit 5
Soft
reset
Clock
Channel
DCO
Open
External
power-
down
pin
function
0 = full
power-
down
1 =
standby
Open
Rev. 0 | Page 34 of 40
8-bit chip ID, Bits[7:0]
Bit 4
1 =
16-bit
address
Clock
Channel
FCO
Open
Open
Open
Bit 3
1 =
16-bit
address
Open
Data
Channel
D
Open
Open
Open
the SPI enters a soft reset, where all of the user registers revert
to their default values and Bit 2 is automatically cleared.
Bit 2
Soft
reset
Open
Data
Channel
C
Open
Open
Open
Open
Bit 1
LSB first
Open
Data
Channel
B
Open
01 = full power-
00 = chip run
Power mode
10 = standby
11 = reset
down
0 = SDO
active
Open
Data
Channel
A
Initiate
Duty
Bit 0
(LSB)
override
cycle
stabilize
0 = off
1 = on
Default
Value
(Hex)
0x18
0x8F
0x3F
0x00
0x00
0x01
Data Sheet
Comments
The nibbles
are mirrored
so that LSB-
first or MSB-
first mode
registers
correctly. The
default for
ADCs is 16-bit
mode.
Unique chip
ID used to
differentiate
devices; read
only.
Unique
speed grade
ID used to
differentiate
graded
devices; read
only.
Bits are set to
determine
which device
on chip
receives the
next write
command.
The default is
all devices on
chip.
Set resolution/
sample rate
override.
Determines
various
generic
modes of chip
operation.
Turns duty
cycle stabilizer
on or off.