PCF8811U/2DA/1 NXP [NXP Semiconductors], PCF8811U/2DA/1 Datasheet - Page 62
PCF8811U/2DA/1
Manufacturer Part Number
PCF8811U/2DA/1
Description
80 x 128 pixels matrix LCD driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF8811U2DA1.pdf
(81 pages)
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NXP Semiconductors
PCF8811_4
Product data sheet
Fig 41. 3-line serial interface timing
SDATA
SCLK
SCE
Table 33.
V
see
[1]
[2]
[3]
[4]
[5]
Symbol
t
t
C
R
3
4
DD1
b
b
Figure
All specified timings are based on 20 % and 80 % of V
t
SCE.
SDO disable time for SPI 3-line or 4-line.
SDO disable time for 3-line serial interface.
Maximum values are for f
printed-circuit board.
H5
= 1.8 V to 3.3 V; V
t
S1
is the time from the previous SCLK rising edge (irrespective of the state of SCE) to the falling edge of
t
PWL1
41,
t
Serial interface timing characteristics
S2
Figure
Parameter
SCE hold time
SDO disable time
capacitive load for SDO
series resistance for SDO
t
PWH1
42,
SS
t
Rev. 04 — 27 June 2008
Figure 43
H1
= 0 V; V
SCLK
= 9 MHz. Series resistance includes ITO track + connector resistance +
LCD
and
Figure
9 V; T
amb
44.
= 40 C to +85 C; unless otherwise specified;
t
[1]
H2
DD
…continued
.
(t
T
H5
cyc
)
80 x 128 pixels matrix LCD driver
[4]
[5]
[5]
t
S2
Min
50
25
-
-
t
PWH2
t
H5
Max
-
100
30
500
PCF8811
© NXP B.V. 2008. All rights reserved.
mgw757
Unit
ns
ns
pF
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