PCF8811U/2DA/1 NXP [NXP Semiconductors], PCF8811U/2DA/1 Datasheet - Page 17

• Manufacturer Part Number: PCF8811U/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF8811_4
Product data sheet
7.1.19.1 DB7 to DB0 (parallel interface)
7.1.19.2 DB7, DB6 and DB5 (serial interface)
7.1.14 R/W/WR
7.1.15 E/RD
7.1.16 SCLH/SCE
7.1.17 SDAH
7.1.18 SDAHOUT
7.1.19 DB7 to DB0
Input to select read or write mode when the 6800 parallel interface is selected. Not used in
the serial and I
E is the clock enable input for the 6800 parallel bus. Not used in the serial or I
interface and must be connected to V
Input to select the chip and so allowing data or commands to be clocked in or input for
serial clock when the I
I
SDAHOUT is the serial data acknowledge output for the I
These input/output lines are used by several interfaces as described below. When not
used in the serial interface or the I
V
8-bit bidirectional bus. DB7 is the MSB.
2
C-bus serial data input. When not used, it must be connected to V
•
•
•
SS1
•
•
•
By connecting SDAHOUT to SDAH externally, the SDAH line becomes fully I
compatible
The acknowledge output is separated from the serial data line due to the following
reasons:
– In COG applications where the track resistance from the SDAHOUT pad to the
– It is possible that during the acknowledge cycle the PCF8811 will not be able to
– By splitting the SDAH input from the SDAHOUT output the device could be used in
– In COG applications where the acknowledge cycle is required, it is necessary to
When not used it must be connected to V
DB7 is used for serial input data (SDATA) when the serial interface is selected
DB6 (SCLK) is used for the serial input clock when the serial interface is selected
DB5 is used as the serial output of the serial interface (SDO)
.
system SDAH line can be significant, a potential divider is generated by the bus
pull-up resistor and the ITO track resistance
create a valid LOW level
a mode that ignores the acknowledge bit
minimize the track resistance from the SDAHOUT pad to the system SDAH line to
guarantee a valid LOW level
2
C-bus mode and must be connected to V
2
C-bus interface is selected.
Rev. 04 — 27 June 2008
2
C-bus interface they must be connected to V
DD1
or V
DD1
SS1
.
or V
SS1
80 x 128 pixels matrix LCD driver
.
DD1
2
C-bus interface.
or V
SS1
DD1
.
PCF8811
© NXP B.V. 2008. All rights reserved.
and V
2
SS1
C-bus
DD1
2
.
C-bus
17 of 81
or