CY7C68310 CYPRESS [Cypress Semiconductor], CY7C68310 Datasheet - Page 28

• Manufacturer Part Number: CY7C68310
• Manufacturer: CYPRESS [Cypress Semiconductor]

8.1
Design practices as outlined in the ATA/ATAPI-6 specification
for signal integrity should be followed with systems that utilize
a ribbon cable interconnect between the CY7C68310’s ATA
interface and the attached ATA/ATAPI device, especially if
Ultra DMA Mode is utilized.
8.2
At no time should the 3.3V power rail drop below the 2.5V rail
for proper device operation. Care should be taken to ensure
that the power rails rise and fall without allowing the 3.3V supply
to drop below the 2.5V supply. The recommended method is
to cascade voltage regulating circuits such that the 2.5V supply
is powered from the 3.3V supply.
8.3
Certain output pins act as open-drain and remain at a high-Z
state unless asserting a ‘0.’ These pins include SCL, SDA,
LOWPWR, and nPWR500. If their functionality is utilized,
these pins must be tied to pull-up resistors to avoid floating
while in a high-Z state. These pins can be left as no-connects
if the functionality is not utilized.
Table 9-1. LOAD_MFG_DATA Command Format
Legal values for wValue are as follows:
Document 38-08030 Rev. *H
• 0x0000
• 0x0001
LOAD_MFG_DATA
Label
ATA Interface Termination
Power Supply Regulation
Pull-ups/Pull-downs on High-Z Pins
to normal operation regardless of previous
command data sets (power-on reset default).
registers control specific CY7C68310 outputs
cells to enable board level testing in the manufac-
turing environment.
Normal operation mode – returns CY7C68310
Manufacturing Test Mode – manufacturing test
1.5KΩ
bmRequestType
3.3V
1.5KΩ
2.4KΩ
(1%)
0x40
3.3V
SDA
SCL
RREF
AVSS
Figure 8-1. External Circuitry Requirements
bRequest
0x05
CY7C68310
Disable/Enable
wValue
9pF
30MHz
9.0
port
Manufacturing Test Mode is provided as a means to implement
board- and system-level interconnect tests. During Manufac-
turing Test Mode operation, all outputs not associated directly
with USB operation are controllable. Normal state machine
and register control of output pins are disabled. Two vendor-
specific
READ_MFG_DATA) are used in Manufacturing Test Mode
operation.
9.1
This USB request is used to enable and control Manufacturing
Test Mode operation. While in Manufacturing Test Mode,
individual pins may be asserted or deasserted depending
upon the contents of the data field. The DD and GPIO pins may
also be set to a high-Z state in preparation for
READ_MFG_DATA command operations. Control of the
select CY7C68310 I/O pins and their high-Z controls are
mapped to the USB data packet associated with this request.
Legal values for wLength are as follows:
• 0x0000
• 0x0007
disabling Manufacturing Test Mode of operation
Manufacturing Test Mode operation, wLength must equal
0x0007. Any data packet lengths greater than 7 will result
in a STALL condition.
100Ω
9pF
VBUSPWRVLD
Starting Address
LOAD_MFG_DATA
Manufacturing Interconnect Test Sup-
USB
wIndex
Valid only when wValue = 0x0000; used when
Valid only when wValue = 0x0001. For proper
RSDM
RSDP
RPU
DM
DP
requests
62KΩ
39Ω
39Ω
1.5KΩ
Data Length
39KΩ
0.1µF
wLength
(LOAD_MFG_DATA
VBUS
D-
D+
CY7C68310
Mfg. Test Data
Page 28 of 34
Data
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