CY7C68310 CYPRESS [Cypress Semiconductor], CY7C68310 Datasheet - Page 2

• Manufacturer Part Number: CY7C68310
• Manufacturer: CYPRESS [Cypress Semiconductor]

2.0
The CY7C68310 implements a USB 2.0 bridge for all
ATA/ATAPI-6 compliant mass storage devices, such as:
2.1
Document 38-08030 Rev. *H
• Hard drives, including small form factor drives (2.5”, 1.8”,
• CD-ROM, CD-R/W
• DVD-ROM, DVD-RAM, DVD-R/W
• MP3 players
• Compact flash
• Microdrives
• Tape drives
• Personal video recorders.
• CY4617 – CY7C68310 Mass Storage Reference Design Kit
• USB Specification version 2.0
• ATA Attachment-6 with Packet Interface revision 3b
• USB Mass Storage Class Bulk-Only Transport specification,
and 1.0”) designed for portable consumer electronics appli-
cations
Rev. 1.0
Additional Resources
Applications
VBUSPWRVLD
SDA_nIMODE
VBUSPWRD
ATAPUEN
nPWR500
DISKRDY
nDMACK
ATAIRQ
VDD33
nDIOW
VDD33
VDD25
IORDY
nDIOR
nCS0
nCS1
SCL
DA0
DA2
DA1
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
60
1
59
2
58
3
57
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
56
55
Figure 4-1. 80-pin TQFP
54
CY7C68310-80AC
53
52
51
50
3.0
The CY7C68310 implements a bridge between one USB port
and one ATA/ATAPI-based mass storage device port. This
bridge adheres to the Mass Storage Class Bulk-Only
Transport specification, version 1.0.
The USB port of the CY7C68310 is connected to a host
computer directly or via the downstream port of a USB hub.
Host software issues commands and data to the CY7C68310
and receives status and data from the CY7C68310 using
standard USB protocol.
The ATA/ATAPI port of the CY7C68310 is connected to a mass
storage device. A 2-Kbyte buffer maximizes ATA/ATAPI data
transfer rates by minimizing losses due to device seek times.
The ATA interface supports ATA PIO modes 0–4, and Ultra
Mode DMA modes 0–4.
The device initialization process is configurable, enabling the
CY7C68310 to initialize most ATA/ATAPI devices without
software intervention. The CY7C68310 can also be configured
to allow software initialization of a device if initialization
requirements are not supported by CY7C68310 algorithms.
4.0
4.1
49
48
47
Pin Diagram
46
Introduction
Pin Assignments
45
44
43
42
41
40
39
38
37
36
35
34
33
32
30
29
28
27
26
25
24
23
22
21
31
DD7
nATARST
nRESET
LOWPWR
SCANEN
GPIO2_nHS
GPIO1
GPIO0
DRVPWRVLD
SYSIRQ
nEJECT
VDD25
TMC2
TMC1
ATAEN
TEST3
VDD33
XO
XI
VSS
CY7C68310
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