CY7C1470BV33-200AXI CYPRESS [Cypress Semiconductor], CY7C1470BV33-200AXI Datasheet - Page 10

• Manufacturer Part Number: CY7C1470BV33-200AXI
• Description: 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 4. Truth Table
The truth table for CY7C1470BV33, CY7C1472BV33, and CY7C1474BV33 follows.
Notes
Document #: 001-15031 Rev. *C
Deselect Cycle
Continue
Deselect Cycle
Read Cycle
(Begin Burst)
Read Cycle
(Continue Burst)
NOP/Dummy Read
(Begin Burst)
Dummy Read
(Continue Burst)
Write Cycle
(Begin Burst)
Write Cycle
(Continue Burst)
NOP/Write Abort
(Begin Burst)
Write Abort
(Continue Burst)
Ignore Clock Edge
(Stall)
Sleep Mode
1. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for ALL Chip Enables active. BWx = 0 signifies at least one Byte Write Select is active, BWx = Valid
2. Write is defined by WE and BW
3. When a write cycle is detected, all IOs are tri-stated, even during Byte Writes.
4. The DQ and DQP pins are controlled by the current cycle and the OE signal.
5. CEN = H inserts wait states.
6. Device powers up deselected with the IOs in a tri-state condition, regardless of OE.
7. OE is asynchronous and is not sampled with the clock rise. It is masked internally during Write cycles. During a read cycle DQ
signifies that the desired byte write selects are asserted, see
inactive or when the device is deselected, and DQ
Operation
None
None
External
Next
External
Next
External
Next
None
Next
Current
None
Address Used
[a:d]
. See
“Partial Write Cycle Description” on page 11
s
= data when OE is active.
CE
H
X
X
X
X
X
X
X
L
L
L
L
“Partial Write Cycle Description” on page 11
ZZ
H
L
L
L
L
L
L
L
L
L
L
L
ADV/LD
H
H
H
H
H
X
X
L
L
L
L
L
for details.
WE
X
X
H
X
H
X
X
X
X
X
L
L
CY7C1472BV33, CY7C1474BV33
BW
X
X
X
X
X
X
H
H
X
X
L
L
x
[1, 2, 3, 4, 5, 6, 7]
for details.
OE
H
H
X
X
L
L
X
X
X
X
X
X
CEN
H
X
L
L
L
L
L
L
L
L
L
L
s
CLK
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
and DQP
X
CY7C1470BV33
[a:d]
Data Out (Q)
Data Out (Q)
Data In (D)
Data In (D)
= tri-state when OE is
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
DQ
-
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