ICS83905AM IDT [Integrated Device Technology], ICS83905AM Datasheet
ICS83905AM
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ICS83905AM Summary of contents
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... BCLK5 15 Available in both standard (RoHS 5) and lead-free (RoHS DDO packages BCLK4 13 GND 12 GND LOCK XTAL_IN XTAL_OUT ENABLE 1 ENABLE 2 1 ICS83905 = V = 2.5V) DD DDO Noise Power D IAGRAM SYNCHRONIZE SYNCHRONIZE ICS83905AM REV. B JULY 9, 2007 BCLK0 BCLK1 BCLK2 BCLK3 BCLK4 BCLK5 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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... Raw Phase Noise Data 100 FFSET REQUENCY ORE UTPUT 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.26ps (typical) 10k 100k 3. ORE UTPUT 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.13ps (typical) 10k 100k ICS83905AM REV. B JULY 9, 2007 ...
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... DD Qx LVCMOS C 2.5 C /1.8V O IRCUIT ORE 9 I NFORMATION SCOPE Qx /2. UTPUT OAD EST IRCUIT 1.25V±5% SCOPE V DDO Qx GND /2. UTPUT OAD EST IRCUIT 0.9V±0.1V V DDO Qx GND -0.9V±0. UTPUT OAD EST IRCUIT ICS83905AM REV. B JULY 9, 2007 SCOPE ...
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... KEW 80% 20% Clock t Outputs UTPUT ISE ALL IME IDT ™ / ICS ™ LVCMOS/LVTTL FANOUT BUFFER BCLKx O D UTPUT UTY 80% 20 PERIOD 100% odc = t PERIOD YCLE ULSE IDTH ERIOD ICS83905AM REV. B JULY 9, 2007 ...
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... For most 50 and R2 can be 100 . This can also be accomplished by removing R1 and making VCC DD R1 .1uf LVCMOS D ENERAL IAGRAM FOR RIVER TO 11 NTERFACE applications, R1 XTAL_IN XTAL_OUT XTAL I I NPUT NTERFACE ICS83905AM REV. B JULY 9, 2007 ...
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... Application Note on Surface Mount Assembly of Amkor’s Thermally /Electrically Enhance Leadframe Base Package, Amkor Technology. EXPOSED PAD THERM AL VIA OARD FOR XPOSED AD HERMAL 12 : UTPUTS SOLDER SIGNAL TRACE Expose Metal Pad (GROUND PAD ELEASE ATH XAMPLE ICS83905AM REV. B JULY 9, 2007 ...
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... Unused outputs can be left floating. There should be no trace attached to unused outputs. Device characterized and specification limits set with all outputs terminated IGURE CHEMATIC OF ECOMMENDED Ohm LVCMOS VDD R3 100 Ohm R4 100 LVCMOS Optional Termination L AYOUT ICS83905AM REV. B JULY 9, 2007 ...
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... JA 0 78.8°C TSSOP EAD by Velocity (Linear Feet per Minute 137.1°C/W 89.0°C VFQFN EAD by Velocity (Meters per Second 60.4°C 71.1°C/W 66.2°C/W 200 500 118.2°C/W 106.8°C/W 81.8°C/W 78.1°C 52.8°C/W 46.0°C/W ICS83905AM REV. B JULY 9, 2007 ...
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... ° 0 ° ICS83905AM REV. B JULY 9, 2007 m ...
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... Reference Document: JEDEC Publication 95, MO-220 VFQFN EAD ICS83905AM REV. B JULY 9, 2007 ...
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... ° & ° ICS83905AM REV. B JULY 9, 2007 ° ° ° ° ° ° ° ° ...
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... ICS83905AM REV. B JULY 9, 2007 ...
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ICS83905 LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States ...