ADV7191 Analog Devices, ADV7191 Datasheet - Page 46
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ADV7191
Manufacturer Part Number
ADV7191
Description
Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs
Manufacturer
Analog Devices
Datasheet
1.ADV7191.pdf
(69 pages)
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ADV7190/ADV7191
The ADV7190/ADV7191 supports closed captioning conforming
to the standard television synchronizing waveform for color
transmission. Closed captioning is transmitted during the
blanked active line time of Line 21 of the odd fields and Line
284 of even fields.
Closed captioning consists of a seven-cycle sinusoidal burst
that is frequency and phase locked to the caption data. After the
clock run-in signal, the blanking level is held for two data bits
and is followed by a Logic Level 1 start bit. Sixteen bits of data
follow the start bit. These consist of two eight-bit bytes, seven
data bits, and one odd parity bit. The data for these bytes is
stored in Closed Captioning Data Registers 0 and 1.
The ADV7190/ADV7191 also supports the extended closed
captioning operation that is active during even fields and is
encoded on Scan Line 284. The data for this operation is stored
in Closed Captioning Extended Data Registers 0 and 1.
All clock run-in signals and timing to support closed captioning on
Lines 21 and 284 are generated automatically by the ADV7190/
ADV7191 All pixel inputs are ignored during Lines 21 and 284
if closed captioning is enabled.
40 IRE
50 IRE
FREQUENCY = F
AMPLITUDE = 40 IRE
REFERENCE COLOR BURST
10.5
10.003 s
(9 CYCLES)
0.25 s
SC
= 3.579545MHz
27.382 s
CLOSED CAPTIONING
APPENDIX 2
(CLOCK RUN-IN)
OF 0.5035 MHz
7 CYCLES
12.91 s
FCC Code of Federal Regulations (CFR) 47 Section 15.119
and EIA608 describe the closed captioning information for Lines
21 and 284.
The ADV7190/ADV7191 uses a single buffering method. This
means that the closed captioning buffer is only one byte deep,
therefore there will be no frame delay in outputting the closed
captioning data, unlike other two byte deep buffering systems.
The data must be loaded one line before (Line 20 or Line 283)
it is outputted on Line 21 and Line 284. A typical implementation
of this method is to use VSYNC to interrupt a microprocessor,
which in turn, will load the new data (two bytes) every field. If
no new data is required for transmission, 0s must be inserted
in both data registers, this is called NULLING. It is also
important to load control codes, all of which are double bytes
on Line 21, or a TV will not recognize them. If there is a mes-
sage like Hello World, which has an odd number of characters, it
is important to pad it out to even in order to get end of caption
2-byte control code to land in the same field.
S
T
A
R
T
D0–D6
TWO 7-BIT + PARITY
ASCII CHARACTERS
BYTE 0
33.764 s
(DATA)
P
A
R
Y
T
I
D0–D6
BYTE 1
P
A
R
T
Y
I