ADV7191 Analog Devices, ADV7191 Datasheet - Page 29

• Manufacturer Part Number: ADV7191
• Description: Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs
• Manufacturer: Analog Devices

MODE REGISTER 0
MR0 (MR07–MR00)
(Address (SR4–SR0) = 00H)
Figure 50 shows the various operations under the control of
Mode Register 0.
MR0 BIT DESCRIPTION
Output Video Standard Selection (MR00–MR01)
These bits are used to set up the encoder mode. The ADV7190/
ADV7191 can be set up to output NTSC, PAL (B, D, G, H, I),
PAL M or PAL N standard video.
Luminance Filter Select (MR02–MR04)
These bits specify which luma filter is to be selected. The filter
selection is made independent of whether PAL or NTSC is
selected.
Chrominance Filter Select (MR05–MR07)
These bits select the chrominance filter. A low-pass filter can be
selected with a choice of cut-off frequencies (0.65 MHz, 1.0 MHz,
1.3 MHz, 2 MHz, or 3 MHz) along with a choice of CIF or
QCIF filters.
MR07 MR06 MR05
0
0
0
0
1
1
1
1
BE WRITTEN
ZERO MUST
TO THIS BIT
MR16
MR17
MR17
0
1
4
0
0
1
1
0
0
1
1
MR07
2
4
CHROMA FILTER SELECT
OVERSAMPLING
CONTROL
0
1
0
1
0
1
0
1
OVERSAMPLING
OVERSAMPLING
MR16
1.3 MHz LOW-PASS FILTER
0.65 MHz LOW-PASS FILTER
1.0 MHz LOW-PASS FILTER
2.0 MHz LOW-PASS FILTER
RESERVED
CIF
QCIF
3.0 MHz LOW-PASS FILTER
MR06
MR15
0
1
DAC CONTROL
POWER-DOWN
NORMAL
DAC A
MR15
MR05
MR14
0
1
MR04 MR03 MR02
DAC CONTROL
0
0
0
0
1
1
1
1
POWER-DOWN
NORMAL
DAC B
MR14
0
0
1
1
0
0
1
1
MR04
MR13
0
1
LUMA FILTER SELECT
0
1
0
1
0
1
0
1
DAC CONTROL
POWER-DOWN
NORMAL
MR13
DAC C
MODE REGISTER 1
MR1 (MR17–MR10)
(Address (SR4–SR0) = 01H)
Figure 51 shows the various operations under the control of
Mode Register 1.
MR1 BIT DESCRIPTION
DAC Control (MR10–MR15)
Bits MR15–MR10 can be used to power down the DACs. This are
used to reduce the power consumption of the ADV7190/ADV7191
or if any of the DACs are not required in the application.
4 Oversampling Control (MR16)
To enable 4× Oversampling this bit has to be set to 1. When
enabled, the data is output at a frequency of 54 MHz.
Note that PLL Enable Control has to be enabled (MR61 = 0) in
4× Oversampling mode.
Reserved (MR17)
A Logical 0 must be written to this bit.
LOW-PASS FILTER (NTSC)
LOW-PASS FILTER (PAL)
NOTCH FILTER (NTSC)
NOTCH FILTER (PAL)
EXTENDED MODE
CIF
QCIF
RESERVED
MR03
MR12
0
1
DAC CONTROL
POWER-DOWN
NORMAL
MR12
DAC D
MR02
MR11
0
1
DAC CONTROL
MR01 MR00
0
0
1
1
POWER-DOWN
NORMAL
DAC E
STANDARD SELECTION
MR11
MR01
OUTPUT VIDEO
0
1
0
1
MR10
0
1
DAC CONTROL
NTSC
PAL (B, D, G, H, I)
PAL (M)
PAL (N)
POWER-DOWN
NORMAL
MR10
DAC F
ADV7190/ADV7191
MR00