MT48LC16M4A2 Micron Technology, MT48LC16M4A2 Datasheet - Page 54

• Manufacturer Part Number: MT48LC16M4A2
• Description: SYNCHRONOUS DRAM
• Manufacturer: Micron Technology

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
AH
AS
CH
CL
CK(3)
CK(2)
CKH
COMMAND
A0-A9, A11
BA0, BA1
DQM /
2. x16: A8, A9 and A11 = “Don’t Care”
CLK
CKE
A10
DQ
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
1.5
2.5
2.5
1
6
–
1
t CMS
t CKS
-6
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
0.8
1.5
2.5
2.5
7.5
0.8
7
-7E
t RCD
t CK
T1
NOP
0.8
1.5
2.5
2.5
7.5
0.8
10
-75
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
t DS
WRITE – DQM OPERATION
10
1
2
3
3
8
1
WRITE
T2
BANK
-8E
D
IN
t CMH
t DH
m
t CH
ns
ns
ns
ns
ns
ns
ns
T3
NOP
54
SYMBOL*
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
RCD
t DS
D
T4
NOP
IN
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.5
1.5
1.5
18
1
1
-6
1
t DS
D
T5
IN
NOP
m + 3
1.5
0.8
1.5
0.8
1.5
t DH
15
-7E
64Mb: x4, x8, x16
1.5
0.8
1.5
0.8
1.5
20
NOP
T6
-75
©2003, Micron Technology, Inc.
20
2
1
2
1
2
SDRAM
-8E
NOP
DON’T CARE
T7
ns
ns
ns
ns
ns
ns