MT48LC16M4A2 Micron Technology, MT48LC16M4A2 Datasheet - Page 46

• Manufacturer Part Number: MT48LC16M4A2
• Description: SYNCHRONOUS DRAM
• Manufacturer: Micron Technology

DQML, DQMH
TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the CAS latency = 2.
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
SYMBOL*
t
t
t
t
t
t
t
t
t
AC(3)
AC(2)
AH
AS
CH
CL
CK(3)
CK(2)
CKH
COMMAND
A0-A9, A11
BA0, BA1
DQM /
CLK
CKE
A10
DQ
2. x16: A8, A9 and A11 = “Don’t Care”
3. Page left open; no
t CKS
t CMS
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t AS
t AS
t AS
1.5
2.5
2.5
1
6
–
1
ACTIVE
BANK
T0
ROW
ROW
-6
t CKH
t CMH
t AH
t AH
t AH
5.5
–
t RCD
t CL
0.8
1.5
2.5
2.5
7.5
0.8
7
-7E
T1
NOP
t CH
5.4
5.4
t
RP.
t CMS
t CK
0.8
1.5
2.5
2.5
7.5
0.8
10
COLUMN m 2
-75
T2
BANK
READ
t CMH
5.4
6
CAS Latency
READ – FULL-PAGE BURST
10
1
2
3
3
8
1
-8E
T3
NOP
t LZ
6
6
t AC
ns
ns
ns
ns
ns
ns
ns
ns
ns
T4
NOP
D
OUT
t OH
1,024 (x4) locations within same row
m
256 (x16) locations within same row
512 (x8) locations within same row
46
t AC
SYMBOL*
t
t
t
t
t
t
t
t
CKS
CMH
CMS
HZ(3)
HZ(2)
LZ
OH
RCD
D
T5
NOP
OUT
t OH
m+1
t AC
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
Full page completed
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.5
1.5
18
D
1
1
2
T6
NOP
OUT
-6
t OH
t AC
1
m+2
5.5
(
(
(
(
(
–
(
)
(
)
(
)
(
)
(
(
)
(
(
(
)
)
)
)
)
)
(
(
(
(
(
(
)
(
)
(
)
)
)
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
1.5
0.8
1.5
Tn + 1
15
1
3
D
NOP
OUT
-7E
t OH
64Mb: x4, x8, x16
m-1
5.4
5.4
t AC
BURST TERM
1.5
0.8
1.5
20
Tn + 2
3
1
3
-75
D
OUT
t OH
m
5.4
6
t AC
©2003, Micron Technology, Inc.
20
2
1
2
1
3
SDRAM
Tn + 3
D
-8E
OUT
NOP
DON’T CARE
UNDEFINED
t OH
m+1
t HZ
6
6
ns
ns
ns
ns
ns
ns
ns
ns
Tn + 4
NOP