MT48LC16M4A2 Micron Technology, MT48LC16M4A2 Datasheet - Page 39

• Manufacturer Part Number: MT48LC16M4A2
• Description: SYNCHRONOUS DRAM
• Manufacturer: Micron Technology

TIMING PARAMETERS
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
*CAS latency indicated in parentheses.
NOTE: 1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not required.
SYMBOL*
t
t
t
t
t
t
AH
AS
CH
CL
CK(3)
CK(2)
DQML, DQMH
A0-A9, A11
COMMAND
DQM /
BA0, BA1
CKE
CLK
A10
DQ
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.5
2.5
2.5
1
6
–
Precharge all
-6
High-Z
t CKS
t CMS
active banks
t AS
SINGLE BANK
ALL BANKS
PRECHARGE
BANK(S)
T0
t AH
t CKH
t CMH
0.8
1.5
2.5
2.5
7.5
t CK
7
-7E
0.8
1.5
2.5
2.5
7.5
t RP
10
T1
NOP
-75
10
1
2
3
3
8
-8E
AUTO REFRESH MODE
REFRESH
T2
AUTO
t CH
ns
ns
ns
ns
ns
ns
t RFC
39
NOP
1
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SYMBOL*
t
t
t
t
t
t
NOP
CKH
CKS
CMH
CMS
RFC
RP
t CL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
Tn + 1
1.5
1.5
60
18
1
1
REFRESH
AUTO
-6
t RFC
0.8
1.5
0.8
1.5
66
15
-7E
NOP
64Mb: x4, x8, x16
1
(
(
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(
)
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(
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)
(
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(
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NOP
0.8
1.5
0.8
1.5
66
20
-75
To + 1
ACTIVE
©2003, Micron Technology, Inc.
ROW
ROW
70
20
BANK
1
2
1
2
SDRAM
-8E
DON’T CARE
ns
ns
ns
ns
ns
ns