ICS1892 Integrated Circuit Systems, ICS1892 Datasheet - Page 86
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ICS1892
Manufacturer Part Number
ICS1892
Description
10Base-T/100Base-TX Integrated PHYceiver
Manufacturer
Integrated Circuit Systems
Datasheet
1.ICS1892.pdf
(148 pages)
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8.11 Register 16: Extended Control Register
ICS1892, Rev. D, 2/26/01
Table 8-16
customize the operations of the device.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 8-16. Extended Control Register (register 16 [0x10])
† The default is the state of this pin at reset.
16.15
16.14
16.13
16.12
16.11
16.10
16.9
16.8
16.7
16.6
16.5
16.4
16.3
16.2
16.1
16.0
Bit
Reserved bits.
ICS1892 Data Sheet
Command Override Write
enable
ICS reserved
ICS reserved
ICS reserved
ICS reserved
PHY Address Bit 4
PHY Address Bit 3
PHY Address Bit 2
PHY Address Bit 1
PHY Address Bit 0
Stream Cipher Test Mode Normal operation
ICS reserved
NRZ/NRZI encoding
Transmit invalid codes
ICS reserved
Stream Cipher disable
lists the bits for the Extended Control Register, which the ICS1892 provides to allow an STA to
Definition
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Disabled
Read unspecified
Read unspecified
Read unspecified
Read unspecified
For a detailed explanation of this bit’s operation,
see
For a detailed explanation of this bit’s operation,
see
For a detailed explanation of this bit’s operation,
see
For a detailed explanation of this bit’s operation,
see
For a detailed explanation of this bit’s operation,
see
Read unspecified
NRZ encoding
Disabled
Read unspecified
Stream Cipher enabled Stream Cipher disabled
Section 6.9, “Status
Section 6.9, “Status
Section 6.9, “Status
Section 6.9, “Status
Section 6.9, “Status
When Bit = 0
Table
86
8-16, see
Interface”.
Interface”.
Interface”.
Interface”.
Interface”.
Enabled
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Test mode
Read unspecified
NRZI encoding
Enabled
Read unspecified
Chapter 1, “Abbreviations and
When Bit = 1
Chapter 8 Management Register Set
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
cess
Ac-
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
SF
SC
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
February 26, 2001
Acronyms”.
P4RD†
P0AC†
P3TD†
P1CL†
P2LI†
fault
De-
0
0
0
0
0
0
–
1
0
0
0
Hex
–
–
–
8
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