ICS1892 Integrated Circuit Systems, ICS1892 Datasheet - Page 15
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ICS1892
Manufacturer Part Number
ICS1892
Description
10Base-T/100Base-TX Integrated PHYceiver
Manufacturer
Integrated Circuit Systems
Datasheet
1.ICS1892.pdf
(148 pages)
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Chapter 4 Overview of the ICS1892
ICS1892, Rev. D, 2/26/01
The ICS1892 is a stream processor. During data transmission, it accepts sequential nibbles from its MAC
(Media Access Control)/Repeater Interface, converts them into a serial bit stream, encodes them, and
transmits them over the medium through an external isolation transformer. When receiving data, the
ICS1892 converts and decodes a serial bit stream (acquired from an isolation transformer that interfaces
with the medium) into sequential nibbles. It subsequently presents these nibbles to its MAC/Repeater
Interface.
The ICS1892 implements the OSI model’s physical layer, consisting of the following, as defined by the
ISO/IEC 8802-3 standard:
•
•
•
•
The ICS1892 is transparent to the next layer of the OSI model, the link layer. The link layer has two
sublayers: the Logical Link Control sublayer and the MAC sublayer. The ICS1892 can interface directly to
a MAC and offers multiple, configurable modes of operation. Alternately, this configurable interface can be
connected to a repeater, which extends the physical layer of the OSI model.
The ICS1892 transmits framed packets acquired from its MAC/Repeater Interface and receives
encapsulated packets from another PHY, which it translates and presents to its MAC/Repeater Interface.
Note:
Physical Coding sublayer (PCS)
Physical Medium Attachment sublayer (PMA)
Physical Medium Dependent sublayer (PMD)
Auto-Negotiation sublayer
ICS1892
As per the ISO/IEC standard, the ICS1892 does not affect, nor is it affected by, the underlying
structure of the MAC/repeater frame it is conveying.
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
15
Chapter 4 Overview of the ICS1892
February 26, 2001
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