ICS1892 Integrated Circuit Systems, ICS1892 Datasheet - Page 29

no-image

ICS1892

Manufacturer Part Number
ICS1892
Description
10Base-T/100Base-TX Integrated PHYceiver
Manufacturer
Integrated Circuit Systems
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS1892
Manufacturer:
ICS
Quantity:
17
Part Number:
ICS1892Y
Manufacturer:
ICS
Quantity:
20 000
6.4 Link Pulse Interface
ICS1892, Rev. D, 2/26/01
The Link Pulse Interface allows an application to control each step in the auto-negotiation process except
for the actual generation and reception of 10Base-T link pulses (that is, Normal Link Pulses). The ICS1892
MAC/Repeater Interface can be configured as a Link Pulse Interface as determined by ICS1892
configuration functions.
The Link Pulse Interface is selected as follows:
Although the 10/100SEL pin must be set for 100M operations, a Normal Link Pulse has the same ISO/IEC
definition regardless of whether the 10/100SEL pin is set for 10M (10 MHz) or 100M (100 MHz.)
The Link Pulse Interface allows the MAC/repeater to control the transmission of Normal Link Pulses to the
remote link partner, thereby allowing the MAC/repeater to control the auto-negotiation processes.
The Link Pulse Interface consists of the following five signals: LTCLK, LPTX, LRCLK, LPRX, and SD.
(When the ICS1892 MAC/Repeater Interface is configured for Link Pulse operations, its default MII pins are
redefined. For more information, see
Interface”.)
Table 6-3
Table 6-3. Pin Mappings for Link Pulse Interface Mode
COL
CRS
LSTA
MDC
MDIO
RXCLK
RXD0, RXD1, RXD2, RXD3 No connect
RXDV
RXER
TXCLK
TXD0, TXD1, TXD2, TXD3
TXEN
TXER
The HW/SW pin must be set for the hardware setting (logic low).
The MII/SI input pin must be set for the Symbol/Serial Interface (logic high).
The 10/LP input pin must be set for Link Pulse mode (logic high).
The 10/100SEL input pin must be set for 100M operations (logic high).
ICS1892
MII Pin Names
10M / 100M
lists the ICS1892 pin mappings for the ICS1892 Link Pulse Interface mode.
Default
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
No connect
No connect
SD
MDC
MDIO
LRCLK
No connect
LPRX
LTCLK
No connect
No connect
LPTX
MAC/Repeater Interface Pin Mappings, Configured for
Section 9.2.4.4, “MAC/Repeater Interface Pins for Link Pulse
29
Link Pulse Interface Mode
Chapter 6 Interface Overviews
February 26, 2001

Related parts for ICS1892