TFA9881_1104 PHILIPS [NXP Semiconductors], TFA9881_1104 Datasheet - Page 11

• Manufacturer Part Number: TFA9881_1104
• Description: 3.4 W PDM input class-D audio amplifier
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
TFA9881
Product data sheet
8.6.1 Invalid Data Protection (IDP)
8.6.2 OverTemperature Protection (OTP)
8.5 High-pass filter
8.6 Protection mechanisms
The high-pass filter will block the DC components in the incoming audio stream. The
cut-off frequency, f
Equation
where k depends on the bandwidth extension setting (see
f
off. The high-pass filter is always enabled.
Remark: Care should be taken when DC dither is applied to the PDM audio input stream.
The PDM source should slowly increase this DC-dither to avoid pop noise.
The following protection circuits are included in the TFA9881:
The reaction of the device to fault conditions differs depending on the protection circuit
involved.
IDP is designed to detect the absence of a data input signal. IDP is activated when 128
consecutive 0s or 1s are received on the DATA input.
IDP is disabled when a PDM stream that does not contain 128 consecutive 0s or 1s is
received. The output stages are set floating when IDP is active.
Remark: The maximum PDM input modulation depth should be limited to avoid false IDP
triggering.
OTP prevents heat damage to the TFA9881. It is triggered when the junction temperature
exceeds 130 °C. When this happens, the output stages are set floating. OTP is cleared
automatically via an internal timer (100 ms with f
stages will start to operate normally again.
high(−3dB)
f
•
•
•
•
•
•
•
high 3dB
k = 2 if bandwidth extension is off
k = 1 if bandwidth extension is on
Invalid Data Protection (IDP)
OverTemperature Protection (OTP)
OverVoltage Protection (OVP)
UnderVoltage Protection (UVP)
OverCurrent Protection (OCP)
– (
1:
is about 7.5 Hz at a clock frequency of 6.144 MHz when bandwidth extension is
)
=
–
----------------------------------------------------- -
f
All information provided in this document is subject to legal disclaimers.
clk
high(−3dB)
⋅
ln
16 k π
(
8191 8192
⋅ ⋅
Rev. 2 — 1 April 2011
, is determined by the clock frequency, and is defined in
⁄
)
3.4 W PDM input class-D audio amplifier
clk
= 6.144 MHz), after which the output
Section
8.4.6):
TFA9881
© NXP B.V. 2011. All rights reserved.
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